mirror of
https://github.com/pvvx/ESP8266.git
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172 lines
4.1 KiB
C
172 lines
4.1 KiB
C
/*
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* Copyright (c) 2009- 2012 Espressif System.
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*
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* Serial Interconnctor Protocol
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*/
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#ifndef _ESP_SIP_H
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#define _ESP_SIP_H
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#include "sip2_common.h"
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#define SIP_PKT_MAX_LEN (1024*16)
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/* 16KB on normal X86 system, should check before porting to orhters */
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#define SIP_TX_AGGR_BUF_SIZE (4 * PAGE_SIZE)
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#define SIP_RX_AGGR_BUF_SIZE (4 * PAGE_SIZE)
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struct sk_buff;
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struct sip_pkt {
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struct list_head list;
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u8 * buf_begin;
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u32 buf_len;
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u8 * buf;
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u32 payload_len;
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#if 0
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union {
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struct sip_tx_pkt_info tx;
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struct sip_rx_pkt_info rx;
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} info;
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#endif
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void *context;
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int status;
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//void (* completion)(struct esp_sip *sip, struct sip_pkt *pkt);
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};
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typedef enum SIP_STATE {
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SIP_INIT = 0,
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SIP_PREPARE_BOOT,
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SIP_BOOT,
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SIP_SEND_INIT,
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SIP_WAIT_BOOTUP,
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SIP_RUN,
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SIP_SUSPEND,
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SIP_STOP
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} SIP_STATE;
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enum sip_notifier {
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SIP_TX_DONE = 1,
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SIP_RX_DONE = 2,
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};
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#define SIP_CREDITS_LOW_THRESHOLD 64 //i.e. 4k
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struct esp_sip {
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struct list_head free_ctrl_txbuf;
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struct list_head free_ctrl_rxbuf;
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u32 rxseq; /* sip pkt seq, should match target side */
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u32 txseq;
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u32 txdataseq;
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atomic_t state;
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spinlock_t lock;
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int boot_credits;
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atomic_t tx_credits;
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atomic_t tx_ask_credit_update;
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u8 * rawbuf; /* used in boot stage, free once chip is fully up */
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u8 * tx_aggr_buf;
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u8 * tx_aggr_write_ptr; /* update after insertion of each pkt */
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u8 * tx_aggr_lastpkt_ptr;
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u8 * rx_aggr_buf;
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u8 * rx_aggr_write_ptr;
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u8 * rx_aggr_lastpkt_ptr;
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spinlock_t rx_lock;
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struct sk_buff_head rxq;
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#ifndef RX_SYNC
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struct work_struct rx_process_work;
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#endif/* RX_SYNC */
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u16 tx_blksz;
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u16 rx_blksz;
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bool dump_rpbm_err;
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bool sendup_rpbm_pkt;
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bool rxabort_fixed;
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bool support_bgscan;
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u8 credit_to_reserve;
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s16 noise_floor;
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u32 tx_tot_len; /* total len for one transaction */
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u32 rx_tot_len;
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atomic_t rx_handling;
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atomic_t tx_data_pkt_queued;
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#ifndef FAST_TX_STATUS
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atomic_t pending_tx_status;
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#endif /* !FAST_TX_STATUS */
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atomic_t data_tx_stopped;
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atomic_t tx_stopped;
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struct esp_pub *epub;
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};
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int sip_rx(struct esp_pub * epub);
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//int sip_download_fw(struct esp_sip *sip, u32 load_addr, u32 boot_addr);
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/* tx must pad as 4-byte aligned */
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int sip_tx(struct esp_pub * epub, struct sip_pkt *pkt);
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int sip_get_raw_credits(struct esp_sip *);
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int sip_write_memory(struct esp_sip *, u32 addr, u8* buf, u16 len);
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void sip_credit_process(struct esp_pub *, u8 credits);
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int sip_prepare_boot(struct esp_sip *sip);
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int sip_send_cmd(struct esp_sip *sip, int cid, u32 cmdlen, void * cmd);
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struct esp_sip * sip_attach(struct esp_pub *);
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int sip_post_init(struct esp_sip *sip, struct sip_evt_bootup2 *bevt);
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void sip_detach(struct esp_sip *sip);
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void sip_txq_process(struct esp_pub *epub);
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struct sk_buff * sip_alloc_ctrl_skbuf(struct esp_sip *sip, u16 len, u32 cid);
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void sip_free_ctrl_skbuff(struct esp_sip *sip, struct sk_buff* skb);
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bool sip_queue_need_stop(struct esp_sip *sip);
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bool sip_queue_may_resume(struct esp_sip *sip);
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bool sip_tx_data_need_stop(struct esp_sip *sip);
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bool sip_tx_data_may_resume(struct esp_sip *sip);
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void sip_tx_data_pkt_enqueue(struct esp_pub *epub, struct sk_buff *skb);
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void sip_rx_data_pkt_enqueue(struct esp_pub *epub, struct sk_buff *skb);
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int sip_cmd_enqueue(struct esp_sip *sip, struct sk_buff *skb);
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void sip_dump_pending_data(struct esp_pub *epub);
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int sip_poll_bootup_event(struct esp_sip *sip);
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int sip_poll_resetting_event(struct esp_sip *sip);
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void sip_trigger_txq_process(struct esp_sip *sip);
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void sip_send_chip_init(struct esp_sip *sip);
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bool mod_support_no_txampdu(void);
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bool mod_support_no_rxampdu(void);
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void mod_support_no_txampdu_set(bool value);
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#ifdef FPGA_DEBUG
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int sip_send_bootup(struct esp_sip *sip);
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#endif /* FPGA_DEBUG */
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void sip_debug_show(struct esp_sip *sip);
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#endif
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