mirror of
https://github.com/eclipse/upm.git
synced 2025-07-02 01:41:12 +03:00
mraa: change all existing code to use libmraa.
* Made CMake depend on 0.4 libmraa Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
This commit is contained in:
@ -31,58 +31,58 @@
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using namespace upm;
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NRF24l01::NRF24l01 (uint8_t cs) {
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maa_init();
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mraa_init();
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nrfInitModule (cs, 8);
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}
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NRF24l01::~NRF24l01 () {
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maa_result_t error = MAA_SUCCESS;
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error = maa_spi_stop(m_spi);
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if (error != MAA_SUCCESS) {
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maa_result_print(error);
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mraa_result_t error = MRAA_SUCCESS;
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error = mraa_spi_stop(m_spi);
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if (error != MRAA_SUCCESS) {
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mraa_result_print(error);
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}
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error = maa_gpio_close (m_cePinCtx);
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if (error != MAA_SUCCESS) {
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maa_result_print(error);
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error = mraa_gpio_close (m_cePinCtx);
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if (error != MRAA_SUCCESS) {
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mraa_result_print(error);
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}
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error = maa_gpio_close (m_csnPinCtx);
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if (error != MAA_SUCCESS) {
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maa_result_print(error);
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error = mraa_gpio_close (m_csnPinCtx);
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if (error != MRAA_SUCCESS) {
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mraa_result_print(error);
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}
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}
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void
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NRF24l01::nrfInitModule (uint8_t chip_select, uint8_t chip_enable) {
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maa_result_t error = MAA_SUCCESS;
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mraa_result_t error = MRAA_SUCCESS;
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m_csn = chip_select;
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m_ce = chip_enable;
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m_channel = 1;
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m_csnPinCtx = maa_gpio_init (m_csn);
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m_csnPinCtx = mraa_gpio_init (m_csn);
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if (m_csnPinCtx == NULL) {
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fprintf (stderr, "Are you sure that pin%d you requested is valid on your platform?", m_csn);
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exit (1);
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}
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m_cePinCtx = maa_gpio_init (m_ce);
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m_cePinCtx = mraa_gpio_init (m_ce);
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if (m_cePinCtx == NULL) {
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fprintf (stderr, "Are you sure that pin%d you requested is valid on your platform?", m_ce);
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exit (1);
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}
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error = maa_gpio_dir (m_csnPinCtx, MAA_GPIO_OUT);
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if (error != MAA_SUCCESS) {
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maa_result_print (error);
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error = mraa_gpio_dir (m_csnPinCtx, MRAA_GPIO_OUT);
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if (error != MRAA_SUCCESS) {
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mraa_result_print (error);
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}
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error = maa_gpio_dir (m_cePinCtx, MAA_GPIO_OUT);
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if (error != MAA_SUCCESS) {
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maa_result_print (error);
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error = mraa_gpio_dir (m_cePinCtx, MRAA_GPIO_OUT);
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if (error != MRAA_SUCCESS) {
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mraa_result_print (error);
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}
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nrfCELow ();
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m_spi = maa_spi_init (0);
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m_spi = mraa_spi_init (0);
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}
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void
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@ -105,8 +105,8 @@ NRF24l01::nrfConfigModule() {
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void
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NRF24l01::nrfConfigRegister(uint8_t reg, uint8_t value) {
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nrfCSOn ();
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maa_spi_write (m_spi, W_REGISTER | (REGISTER_MASK & reg));
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maa_spi_write (m_spi, value);
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mraa_spi_write (m_spi, W_REGISTER | (REGISTER_MASK & reg));
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mraa_spi_write (m_spi, value);
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nrfCSOff ();
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}
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@ -122,7 +122,7 @@ NRF24l01::nrfPowerUpRX() {
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void
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NRF24l01::nrfFlushRX() {
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nrfCSOn ();
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maa_spi_write (m_spi, FLUSH_RX);
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mraa_spi_write (m_spi, FLUSH_RX);
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nrfCSOff ();
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}
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@ -160,7 +160,7 @@ void
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NRF24l01::nrfWriteRegister(uint8_t reg, uint8_t * value, uint8_t len)
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{
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nrfCSOn ();
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maa_spi_write (m_spi, W_REGISTER | (REGISTER_MASK & reg));
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mraa_spi_write (m_spi, W_REGISTER | (REGISTER_MASK & reg));
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nrfTransmitSync(value, len);
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nrfCSOff ();
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}
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@ -169,7 +169,7 @@ void
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NRF24l01::nrfTransmitSync(uint8_t *dataout, uint8_t len){
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uint8_t i;
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for(i = 0; i < len; i++) {
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maa_spi_write (m_spi, dataout[i]);
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mraa_spi_write (m_spi, dataout[i]);
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}
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}
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@ -196,7 +196,7 @@ void
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NRF24l01::nrfReadRegister (uint8_t reg, uint8_t * value, uint8_t len)
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{
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nrfCSOn ();
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maa_spi_write (m_spi, R_REGISTER | (REGISTER_MASK & reg));
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mraa_spi_write (m_spi, R_REGISTER | (REGISTER_MASK & reg));
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nrfTransferSync (value, value, len);
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nrfCSOff ();
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}
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@ -205,7 +205,7 @@ void
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NRF24l01::nrfTransferSync (uint8_t *dataout,uint8_t *datain,uint8_t len) {
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uint8_t i;
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for(i = 0;i < len;i++) {
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datain[i] = maa_spi_write (m_spi, dataout[i]);
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datain[i] = mraa_spi_write (m_spi, dataout[i]);
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}
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}
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@ -222,7 +222,7 @@ NRF24l01::nrfGetData (uint8_t * data)
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{
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nrfCSOn ();
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/* Send cmd to read rx payload */
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maa_spi_write (m_spi, R_RX_PAYLOAD);
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mraa_spi_write (m_spi, R_RX_PAYLOAD);
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/* Read payload */
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nrfTransferSync(data, data, m_payload);
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nrfCSOff ();
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@ -248,11 +248,11 @@ NRF24l01::nrfSend(uint8_t * value) {
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nrfCELow();
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nrfPowerUpTX(); // Set to transmitter mode , Power up
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nrfCSOn ();
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maa_spi_write (m_spi, FLUSH_TX); // Write cmd to flush tx fifo
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mraa_spi_write (m_spi, FLUSH_TX); // Write cmd to flush tx fifo
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nrfCSOff ();
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nrfCSOn ();
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maa_spi_write (m_spi, W_TX_PAYLOAD); // Write cmd to write payload
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mraa_spi_write (m_spi, W_TX_PAYLOAD); // Write cmd to write payload
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nrfTransmitSync(value, m_payload); // Write payload
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nrfCSOff ();
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nrfCEHigh(); // Start transmission
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@ -290,24 +290,24 @@ NRF24l01::nrfPowerDown () {
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nrfConfigRegister (CONFIG, NRF_CONFIG);
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}
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maa_result_t
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mraa_result_t
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NRF24l01::nrfCEHigh () {
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return maa_gpio_write (m_cePinCtx, HIGH);
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return mraa_gpio_write (m_cePinCtx, HIGH);
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}
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maa_result_t
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mraa_result_t
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NRF24l01::nrfCELow () {
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return maa_gpio_write (m_cePinCtx, LOW);
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return mraa_gpio_write (m_cePinCtx, LOW);
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}
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maa_result_t
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mraa_result_t
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NRF24l01::nrfCSOn () {
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return maa_gpio_write (m_csnPinCtx, LOW);
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return mraa_gpio_write (m_csnPinCtx, LOW);
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}
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maa_result_t
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mraa_result_t
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NRF24l01::nrfCSOff () {
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return maa_gpio_write (m_csnPinCtx, HIGH);
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return mraa_gpio_write (m_csnPinCtx, HIGH);
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}
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void
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@ -24,9 +24,9 @@
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#pragma once
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#include <string>
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#include <maa/aio.h>
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#include <maa/gpio.h>
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#include <maa/spi.h>
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#include <mraa/aio.h>
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#include <mraa/gpio.h>
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#include <mraa/spi.h>
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/* Memory Map */
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#define CONFIG 0x00
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@ -297,22 +297,22 @@ class NRF24l01 {
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/**
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* Set chip enable pin HIGH
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*/
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maa_result_t nrfCEHigh ();
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mraa_result_t nrfCEHigh ();
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/**
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* Set chip enable LOW
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*/
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maa_result_t nrfCELow ();
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mraa_result_t nrfCELow ();
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/**
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* Set chip select pin LOW
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*/
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maa_result_t nrfCSOn ();
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mraa_result_t nrfCSOn ();
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/**
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* Set chip select pin HIGH
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*/
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maa_result_t nrfCSOff ();
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mraa_result_t nrfCSOff ();
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/**
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* Flush reciver stack
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@ -330,7 +330,7 @@ class NRF24l01 {
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funcPtrVoidVoid dataRecievedHandler; /**< Data arrived handler */
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private:
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maa_spi_context m_spi;
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mraa_spi_context m_spi;
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uint8_t m_ce;
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uint8_t m_csn;
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uint8_t m_channel;
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@ -338,8 +338,8 @@ class NRF24l01 {
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uint8_t m_payload;
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uint8_t m_localAddress[5];
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maa_gpio_context m_csnPinCtx;
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maa_gpio_context m_cePinCtx;
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mraa_gpio_context m_csnPinCtx;
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mraa_gpio_context m_cePinCtx;
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std::string m_name;
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};
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