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133 lines
3.5 KiB
C++
133 lines
3.5 KiB
C++
/*
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* Author: Brendan Le Foll <brendan.le.foll@intel.com>
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* Copyright (c) 2014 Intel Corporation.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "math.h"
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#include "hmc5883l.h"
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#define MAX_BUFFER_LENGTH 6
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#define HMC5883L_I2C_ADDR 0x1E
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//configuration registers
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#define HMC5883L_CONF_REG_A 0x00
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#define HMC5883L_CONF_REG_B 0x01
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//mode register
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#define HMC5883L_MODE_REG 0x02
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//data register
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#define HMC5883L_X_MSB_REG 0
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#define HMC5883L_X_LSB_REG 1
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#define HMC5883L_Z_MSB_REG 2
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#define HMC5883L_Z_LSB_REG 3
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#define HMC5883L_Y_MSB_REG 4
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#define HMC5883L_Y_LSB_REG 5
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#define DATA_REG_SIZE 6
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//status register
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#define HMC5883L_STATUS_REG 0x09
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//ID registers
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#define HMC5883L_ID_A_REG 0x0A
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#define HMC5883L_ID_B_REG 0x0B
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#define HMC5883L_ID_C_REG 0x0C
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#define HMC5883L_CONT_MODE 0x00
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#define HMC5883L_DATA_REG 0x03
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//scales
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#define GA_0_88_REG 0x00 << 5
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#define GA_1_3_REG 0x01 << 5
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#define GA_1_9_REG 0x02 << 5
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#define GA_2_5_REG 0x03 << 5
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#define GA_4_0_REG 0x04 << 5
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#define GA_4_7_REG 0x05 << 5
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#define GA_5_6_REG 0x06 << 5
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#define GA_8_1_REG 0x07 << 5
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//digital resolutions
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#define SCALE_0_73_MG 0.73
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#define SCALE_0_92_MG 0.92
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#define SCALE_1_22_MG 1.22
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#define SCALE_1_52_MG 1.52
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#define SCALE_2_27_MG 2.27
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#define SCALE_2_56_MG 2.56
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#define SCALE_3_03_MG 3.03
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#define SCALE_4_35_MG 4.35
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using namespace upm;
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Hmc5883l::Hmc5883l()
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{
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m_i2c = maa_i2c_init();
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maa_i2c_address(m_i2c, HMC5883L_I2C_ADDR);
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m_rx_tx_buf[0] = HMC5883L_CONF_REG_B;
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m_rx_tx_buf[1] = GA_1_3_REG;
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maa_i2c_write(m_i2c, m_rx_tx_buf, 2);
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maa_i2c_address(m_i2c, HMC5883L_I2C_ADDR);
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m_rx_tx_buf[0] = HMC5883L_MODE_REG;
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m_rx_tx_buf[1] = HMC5883L_CONT_MODE;
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maa_i2c_write(m_i2c, m_rx_tx_buf, 2);
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Hmc5883l::update();
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}
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int
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Hmc5883l::update(void)
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{
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maa_i2c_address(m_i2c, HMC5883L_I2C_ADDR);
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maa_i2c_write_byte(m_i2c, HMC5883L_DATA_REG);
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maa_i2c_address(m_i2c, HMC5883L_I2C_ADDR);
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maa_i2c_read(m_i2c, m_rx_tx_buf, DATA_REG_SIZE);
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// x
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m_coor[0] = (m_rx_tx_buf[HMC5883L_X_MSB_REG] << 8 ) | m_rx_tx_buf[HMC5883L_X_LSB_REG];
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// z
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m_coor[2] = (m_rx_tx_buf[HMC5883L_Z_MSB_REG] << 8 ) | m_rx_tx_buf[HMC5883L_Z_LSB_REG];
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// y
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m_coor[1] = (m_rx_tx_buf[HMC5883L_Y_MSB_REG] << 8 ) | m_rx_tx_buf[HMC5883L_Y_LSB_REG];
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return MAA_SUCCESS;
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}
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float
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Hmc5883l::direction(void)
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{
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return atan2(m_coor[1] * SCALE_0_92_MG, m_coor[0] * SCALE_0_92_MG);
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}
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float
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Hmc5883l::heading(void)
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{
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return Hmc5883l::direction() * 180/M_PI;
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}
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int*
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Hmc5883l::coordinates(void)
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{
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return &m_coor[0];
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}
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