614 lines
17 KiB
C
614 lines
17 KiB
C
#include <string.h>
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include <driver/spi_master.h>
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#include <driver/gpio.h>
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#include "esp_log.h"
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#include "mirf.h"
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#define TAG "NRF24"
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// SPI Stuff
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#if CONFIG_SPI2_HOST
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#define HOST_ID SPI2_HOST
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#elif CONFIG_SPI3_HOST
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#define HOST_ID SPI3_HOST
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#endif
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static const int SPI_Frequency = 4000000; // Stable even with a long jumper cable
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//static const int SPI_Frequency = 6000000;
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//static const int SPI_Frequency = 8000000; // Requires a short jumper cable
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//static const int SPI_Frequency = 10000000; // Unstable even with a short jumper cable
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//const char rf24_datarates[][8] = {"1Mbps", "2Mbps", "250Kbps"};
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char rf24_datarates[][8] = {"1Mbps", "2Mbps", "250Kbps"};
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const char rf24_crclength[][10] = {"Disabled", "8 bits", "16 bits"};
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//const char rf24_pa_dbm[][8] = {"PA_MIN", "PA_LOW", "PA_HIGH", "PA_MAX"};
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char rf24_pa_dbm[][8] = {"PA_MIN", "PA_LOW", "PA_HIGH", "PA_MAX"};
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void Nrf24_init(NRF24_t * dev)
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{
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esp_err_t ret;
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ESP_LOGI(TAG, "CONFIG_MISO_GPIO=%d", CONFIG_MISO_GPIO);
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ESP_LOGI(TAG, "CONFIG_MOSI_GPIO=%d", CONFIG_MOSI_GPIO);
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ESP_LOGI(TAG, "CONFIG_SCLK_GPIO=%d", CONFIG_SCLK_GPIO);
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ESP_LOGI(TAG, "CONFIG_CE_GPIO=%d", CONFIG_CE_GPIO);
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ESP_LOGI(TAG, "CONFIG_CSN_GPIO=%d", CONFIG_CSN_GPIO);
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//gpio_pad_select_gpio(CONFIG_CE_GPIO);
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gpio_reset_pin(CONFIG_CE_GPIO);
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gpio_set_direction(CONFIG_CE_GPIO, GPIO_MODE_OUTPUT);
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gpio_set_level(CONFIG_CE_GPIO, 0);
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//gpio_pad_select_gpio(CONFIG_CSN_GPIO);
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gpio_reset_pin(CONFIG_CSN_GPIO);
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gpio_set_direction(CONFIG_CSN_GPIO, GPIO_MODE_OUTPUT);
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gpio_set_level(CONFIG_CSN_GPIO, 1);
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spi_bus_config_t spi_bus_config = {
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.sclk_io_num = CONFIG_SCLK_GPIO,
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.mosi_io_num = CONFIG_MOSI_GPIO,
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.miso_io_num = CONFIG_MISO_GPIO,
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.quadwp_io_num = -1,
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.quadhd_io_num = -1
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};
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ret = spi_bus_initialize( HOST_ID, &spi_bus_config, SPI_DMA_CH_AUTO );
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ESP_LOGI(TAG, "spi_bus_initialize=%d",ret);
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assert(ret==ESP_OK);
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spi_device_interface_config_t devcfg;
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memset( &devcfg, 0, sizeof( spi_device_interface_config_t ) );
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devcfg.clock_speed_hz = SPI_Frequency;
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// It does not work with hardware CS control.
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//devcfg.spics_io_num = csn_pin;
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// It does work with software CS control.
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devcfg.spics_io_num = -1;
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devcfg.queue_size = 7;
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devcfg.mode = 0;
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devcfg.flags = SPI_DEVICE_NO_DUMMY;
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spi_device_handle_t handle;
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ret = spi_bus_add_device( HOST_ID, &devcfg, &handle);
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ESP_LOGI(TAG, "spi_bus_add_device=%d",ret);
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assert(ret==ESP_OK);
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dev->cePin = CONFIG_CE_GPIO;
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dev->csnPin = CONFIG_CSN_GPIO;
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dev->channel = 1;
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dev->payload = 16;
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dev->_SPIHandle = handle;
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}
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bool spi_write_byte(NRF24_t * dev, uint8_t* Dataout, size_t DataLength )
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{
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spi_transaction_t SPITransaction;
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if ( DataLength > 0 ) {
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memset( &SPITransaction, 0, sizeof( spi_transaction_t ) );
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SPITransaction.length = DataLength * 8;
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SPITransaction.tx_buffer = Dataout;
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SPITransaction.rx_buffer = NULL;
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spi_device_transmit( dev->_SPIHandle, &SPITransaction );
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}
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return true;
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}
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bool spi_read_byte(NRF24_t * dev, uint8_t* Datain, uint8_t* Dataout, size_t DataLength )
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{
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spi_transaction_t SPITransaction;
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if ( DataLength > 0 ) {
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memset( &SPITransaction, 0, sizeof( spi_transaction_t ) );
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SPITransaction.length = DataLength * 8;
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SPITransaction.tx_buffer = Dataout;
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SPITransaction.rx_buffer = Datain;
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spi_device_transmit( dev->_SPIHandle, &SPITransaction );
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}
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return true;
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}
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uint8_t spi_transfer(NRF24_t * dev, uint8_t address) {
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uint8_t datain[1];
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uint8_t dataout[1];
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dataout[0] = address;
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//spi_write_byte(dev, dataout, 1 );
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spi_read_byte(dev, datain, dataout, 1 );
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return datain[0];
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}
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void spi_csnHi(NRF24_t * dev) {
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gpio_set_level( dev->csnPin, 1 );
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}
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void spi_csnLow(NRF24_t * dev) {
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gpio_set_level( dev->csnPin, 0 );
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}
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// Sets the important registers in the MiRF module and powers the module
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// in receiving mode
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// NB: channel and payload must be set now.
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void Nrf24_config(NRF24_t * dev, uint8_t channel, uint8_t payload)
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{
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dev->channel = channel;
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dev->payload = payload;
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Nrf24_configRegister(dev, RF_CH, dev->channel); // Set RF channel
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Nrf24_configRegister(dev, RX_PW_P0, dev->payload); // Set length of incoming payload
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Nrf24_configRegister(dev, RX_PW_P1, dev->payload);
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Nrf24_powerUpRx(dev); // Start receiver
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Nrf24_flushRx(dev);
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}
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// Sets the receiving device address
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//void Nrf24_setRADDR(NRF24_t * dev, uint8_t * adr)
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esp_err_t Nrf24_setRADDR(NRF24_t * dev, uint8_t * adr)
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{
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esp_err_t ret = ESP_OK;
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Nrf24_writeRegister(dev, RX_ADDR_P1, adr, mirf_ADDR_LEN);
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uint8_t buffer[5];
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Nrf24_readRegister(dev, RX_ADDR_P1, buffer, sizeof(buffer));
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for (int i=0;i<5;i++) {
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ESP_LOGD(TAG, "adr[%d]=0x%x buffer[%d]=0x%x", i, adr[i], i, buffer[i]);
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if (adr[i] != buffer[i]) ret = ESP_FAIL;
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}
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return ret;
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}
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// Sets the transmitting device address
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//void Nrf24_setTADDR(NRF24_t * dev, uint8_t * adr)
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esp_err_t Nrf24_setTADDR(NRF24_t * dev, uint8_t * adr)
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{
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esp_err_t ret = ESP_OK;
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Nrf24_writeRegister(dev, RX_ADDR_P0, adr, mirf_ADDR_LEN); //RX_ADDR_P0 must be set to the sending addr for auto ack to work.
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Nrf24_writeRegister(dev, TX_ADDR, adr, mirf_ADDR_LEN);
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uint8_t buffer[5];
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Nrf24_readRegister(dev, RX_ADDR_P0, buffer, sizeof(buffer));
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for (int i=0;i<5;i++) {
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ESP_LOGD(TAG, "adr[%d]=0x%x buffer[%d]=0x%x", i, adr[i], i, buffer[i]);
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if (adr[i] != buffer[i]) ret = ESP_FAIL;
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}
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return ret;
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}
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// Add the receiving device address
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void Nrf24_addRADDR(NRF24_t * dev, uint8_t pipe, uint8_t adr)
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{
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uint8_t value;
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Nrf24_readRegister(dev, EN_RXADDR, &value, 1);
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if (pipe == 2) {
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Nrf24_configRegister(dev, RX_PW_P2, dev->payload);
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Nrf24_configRegister(dev, RX_ADDR_P2, adr);
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value = value | 0x04;
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Nrf24_configRegister(dev, EN_RXADDR, value);
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} else if (pipe == 3) {
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Nrf24_configRegister(dev, RX_PW_P3, dev->payload);
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Nrf24_configRegister(dev, RX_ADDR_P3, adr);
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value = value | 0x08;
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Nrf24_configRegister(dev, EN_RXADDR, value);
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} else if (pipe == 4) {
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Nrf24_configRegister(dev, RX_PW_P4, dev->payload);
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Nrf24_configRegister(dev, RX_ADDR_P4, adr);
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value = value | 0x10;
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Nrf24_configRegister(dev, EN_RXADDR, value);
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} else if (pipe == 5) {
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Nrf24_configRegister(dev, RX_PW_P5, dev->payload);
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Nrf24_configRegister(dev, RX_ADDR_P5, adr);
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value = value | 0x20;
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Nrf24_configRegister(dev, EN_RXADDR, value);
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}
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}
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// Checks if data is available for reading
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extern bool Nrf24_dataReady(NRF24_t * dev)
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{
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// See note in getData() function - just checking RX_DR isn't good enough
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uint8_t status = Nrf24_getStatus(dev);
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//printf("Nrf24_dataReady status=0x%x\n", status);
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if ( status & (1 << RX_DR) ) {
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// Save status
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dev->status = status;
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return 1;
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}
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// We can short circuit on RX_DR, but if it's not set, we still need
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// to check the FIFO for any pending packets
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//return !Nrf24_rxFifoEmpty(dev);
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return 0;
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}
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// Get pipe number for reading
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uint8_t Nrf24_getDataPipe(NRF24_t * dev) {
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//uint8_t status = Nrf24_getStatus(dev);
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//printf("dev->status=0x%x\n",dev->status);
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return ((dev->status & 0x0E) >> 1);
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}
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extern bool Nrf24_rxFifoEmpty(NRF24_t * dev)
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{
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uint8_t fifoStatus;
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Nrf24_readRegister(dev, FIFO_STATUS, &fifoStatus, sizeof(fifoStatus));
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return (fifoStatus & (1 << RX_EMPTY));
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}
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// Reads payload bytes into data array
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extern void Nrf24_getData(NRF24_t * dev, uint8_t * data)
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{
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spi_csnLow(dev); // Pull down chip select
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spi_transfer(dev, R_RX_PAYLOAD ); // Send cmd to read rx payload
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spi_read_byte(dev, data, data, dev->payload); // Read payload
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spi_csnHi(dev); // Pull up chip select
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// NVI: per product spec, p 67, note c:
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// "The RX_DR IRQ is asserted by a new packet arrival event. The procedure
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// for handling this interrupt should be: 1) read payload through SPI,
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// 2) clear RX_DR IRQ, 3) read FIFO_STATUS to check if there are more
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// payloads available in RX FIFO, 4) if there are more data in RX FIFO,
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// repeat from step 1)."
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// So if we're going to clear RX_DR here, we need to check the RX FIFO
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// in the dataReady() function
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Nrf24_configRegister(dev, STATUS, (1 << RX_DR)); // Reset status register
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}
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// Clocks only one byte into the given MiRF register
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void Nrf24_configRegister(NRF24_t * dev, uint8_t reg, uint8_t value)
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{
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spi_csnLow(dev);
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spi_transfer(dev, W_REGISTER | (REGISTER_MASK & reg));
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spi_transfer(dev, value);
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spi_csnHi(dev);
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}
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// Reads an array of bytes from the given start position in the MiRF registers
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void Nrf24_readRegister(NRF24_t * dev, uint8_t reg, uint8_t * value, uint8_t len)
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{
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spi_csnLow(dev);
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spi_transfer(dev, R_REGISTER | (REGISTER_MASK & reg));
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spi_read_byte(dev, value, value, len);
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spi_csnHi(dev);
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}
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// Writes an array of bytes into inte the MiRF registers
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void Nrf24_writeRegister(NRF24_t * dev, uint8_t reg, uint8_t * value, uint8_t len)
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{
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spi_csnLow(dev);
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spi_transfer(dev, W_REGISTER | (REGISTER_MASK & reg));
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spi_write_byte(dev, value, len);
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spi_csnHi(dev);
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}
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// Sends a data package to the default address. Be sure to send the correct
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// amount of bytes as configured as payload on the receiver.
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void Nrf24_send(NRF24_t * dev, uint8_t * value)
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{
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uint8_t status;
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status = Nrf24_getStatus(dev);
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while (dev->PTX) // Wait until last paket is send
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{
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status = Nrf24_getStatus(dev);
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if ((status & ((1 << TX_DS) | (1 << MAX_RT))))
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{
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dev->PTX = 0;
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break;
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}
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}
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Nrf24_ceLow(dev);
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Nrf24_powerUpTx(dev); // Set to transmitter mode , Power up
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spi_csnLow(dev); // Pull down chip select
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spi_transfer(dev, FLUSH_TX ); // Write cmd to flush tx fifo
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spi_csnHi(dev); // Pull up chip select
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spi_csnLow(dev); // Pull down chip select
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spi_transfer(dev, W_TX_PAYLOAD ); // Write cmd to write payload
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spi_write_byte(dev, value, dev->payload); // Write payload
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spi_csnHi(dev); // Pull up chip select
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Nrf24_ceHi(dev); // Start transmission
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}
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// Test if chip is still sending.
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// When sending has finished return chip to listening.
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bool Nrf24_isSending(NRF24_t * dev) {
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uint8_t status;
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if (dev->PTX)
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{
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status = Nrf24_getStatus(dev);
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if ((status & ((1 << TX_DS) | (1 << MAX_RT)))) {// if sending successful (TX_DS) or max retries exceded (MAX_RT).
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Nrf24_powerUpRx(dev);
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return false;
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}
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return true;
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}
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return false;
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}
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// Test if Sending has finished or retry is over.
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// When sending has finished return trur.
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// When reach maximum number of TX retries return false.
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bool Nrf24_isSend(NRF24_t * dev, int timeout) {
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uint8_t status;
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TickType_t startTick = xTaskGetTickCount();
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if (dev->PTX) {
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while(1) {
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status = Nrf24_getStatus(dev);
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/*
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if sending successful (TX_DS) or max retries exceded (MAX_RT).
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*/
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if (status & (1 << TX_DS)) { // Data Sent TX FIFO interrup
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Nrf24_powerUpRx(dev);
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return true;
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}
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if (status & (1 << MAX_RT)) { // Maximum number of TX retries interrupt
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ESP_LOGW(TAG, "Maximum number of TX retries interrupt");
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Nrf24_powerUpRx(dev);
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return false;
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}
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// I believe either TX_DS or MAX_RT will always be notified.
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// Therefore, it is unusual for neither to be notified for a period of time.
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// I don't know exactly how to respond.
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TickType_t diffTick = xTaskGetTickCount() - startTick;
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if ( (diffTick * portTICK_PERIOD_MS) > timeout) {
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ESP_LOGE(TAG, "Status register timeout. status=0x%x", status);
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return false;
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}
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vTaskDelay(1);
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}
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}
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return false;
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}
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uint8_t Nrf24_getStatus(NRF24_t * dev) {
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uint8_t rv;
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Nrf24_readRegister(dev, STATUS, &rv, 1);
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return rv;
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}
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void Nrf24_powerUpRx(NRF24_t * dev) {
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dev->PTX = 0;
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Nrf24_ceLow(dev);
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Nrf24_configRegister(dev, CONFIG, mirf_CONFIG | ( (1 << PWR_UP) | (1 << PRIM_RX) ) ); //set device as RX mode
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Nrf24_ceHi(dev);
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Nrf24_configRegister(dev, STATUS, (1 << TX_DS) | (1 << MAX_RT)); //Clear seeded interrupt and max tx number interrupt
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}
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void Nrf24_flushRx(NRF24_t * dev)
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{
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spi_csnLow(dev);
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spi_transfer(dev, FLUSH_RX );
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spi_csnHi(dev);
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}
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void Nrf24_powerUpTx(NRF24_t * dev) {
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dev->PTX = 1;
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Nrf24_configRegister(dev, CONFIG, mirf_CONFIG | ( (1 << PWR_UP) | (0 << PRIM_RX) ) ); //set device as TX mode
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Nrf24_configRegister(dev, STATUS, (1 << TX_DS) | (1 << MAX_RT)); //Clear seeded interrupt and max tx number interrupt
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}
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void Nrf24_ceHi(NRF24_t * dev) {
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gpio_set_level( dev->cePin, 1 );
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}
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void Nrf24_ceLow(NRF24_t * dev) {
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gpio_set_level( dev->cePin, 0 );
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}
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void Nrf24_powerDown(NRF24_t * dev)
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{
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Nrf24_ceLow(dev);
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Nrf24_configRegister(dev, CONFIG, mirf_CONFIG );
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}
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//Set tx power : 0=-18dBm,1=-12dBm,2=-6dBm,3=0dBm
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void Nrf24_SetOutputRF_PWR(NRF24_t * dev, uint8_t val)
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{
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if (val > 3) return;
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uint8_t value;
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Nrf24_readRegister(dev, RF_SETUP, &value, 1);
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value = value & 0xF9;
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value = value | (val<< RF_PWR);
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//Nrf24_configRegister(dev, RF_SETUP, (val<< RF_PWR) );
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Nrf24_configRegister(dev, RF_SETUP, value);
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}
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//Select between the high speed data rates:0=1Mbps, 1=2Mbps, 2=250Kbps
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void Nrf24_SetSpeedDataRates(NRF24_t * dev, uint8_t val)
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{
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if (val > 2) return;
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uint8_t value;
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Nrf24_readRegister(dev, RF_SETUP, &value, 1);
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if(val == 2)
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{
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value = value | 0x20;
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value = value & 0xF7;
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//Nrf24_configRegister(dev, RF_SETUP, (1 << RF_DR_LOW) );
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Nrf24_configRegister(dev, RF_SETUP, value);
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}
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else
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{
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value = value & 0xD7;
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value = value | (val << RF_DR_HIGH);
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//Nrf24_configRegister(dev, RF_SETUP, (val << RF_DR_HIGH) );
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Nrf24_configRegister(dev, RF_SETUP, value);
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}
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}
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//Set Auto Retransmit Delay 0=250us, 1=500us, ... 15=4000us
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void Nrf24_setRetransmitDelay(NRF24_t * dev, uint8_t val)
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{
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uint8_t value;
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Nrf24_readRegister(dev, SETUP_RETR, &value, 1);
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value = value & 0x0F;
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value = value | (val << ARD);
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Nrf24_configRegister(dev, SETUP_RETR, value);
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}
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void Nrf24_printDetails(NRF24_t * dev)
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{
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printf("================ SPI Configuration ================\n" );
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printf("CSN Pin \t = GPIO%d\n",dev->csnPin);
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printf("CE Pin \t = GPIO%d\n", dev->cePin);
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printf("Clock Speed\t = %d\n", SPI_Frequency);
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printf("================ NRF Configuration ================\n");
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Nrf24_print_status(Nrf24_getStatus(dev));
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Nrf24_print_address_register(dev, "RX_ADDR_P0-1", RX_ADDR_P0, 2);
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Nrf24_print_byte_register(dev, "RX_ADDR_P2-5", RX_ADDR_P2, 4);
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Nrf24_print_address_register(dev, "TX_ADDR\t", TX_ADDR, 1);
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Nrf24_print_byte_register(dev, "RX_PW_P0-6", RX_PW_P0, 6);
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Nrf24_print_byte_register(dev, "EN_AA\t", EN_AA, 1);
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Nrf24_print_byte_register(dev, "EN_RXADDR", EN_RXADDR, 1);
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Nrf24_print_byte_register(dev, "RF_CH\t", RF_CH, 1);
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Nrf24_print_byte_register(dev, "RF_SETUP", RF_SETUP, 1);
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Nrf24_print_byte_register(dev, "CONFIG\t", CONFIG, 1);
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Nrf24_print_byte_register(dev, "DYNPD/FEATURE", DYNPD, 2);
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//printf("getDataRate()=%d\n",Nrf24_getDataRate(dev));
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printf("Data Rate\t = %s\n",rf24_datarates[Nrf24_getDataRate(dev)]);
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#if 0
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printf_P(PSTR("Model\t\t = "
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PRIPSTR
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"\r\n"),pgm_read_ptr(&rf24_model_e_str_P[isPVariant()]));
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#endif
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//printf("getCRCLength()=%d\n",Nrf24_getCRCLength(dev));
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printf("CRC Length\t = %s\n", rf24_crclength[Nrf24_getCRCLength(dev)]);
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//printf("getPALevel()=%d\n",Nrf24_getPALevel(dev));
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printf("PA Power\t = %s\n", rf24_pa_dbm[Nrf24_getPALevel(dev)]);
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uint8_t retransmit = Nrf24_getRetransmitDelay(dev);
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int16_t delay = (retransmit+1)*250;
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printf("Retransmit\t = %d us\n", delay);
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}
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#define _BV(x) (1<<(x))
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void Nrf24_print_status(uint8_t status)
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|
{
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printf("STATUS\t\t = 0x%02x RX_DR=%x TX_DS=%x MAX_RT=%x RX_P_NO=%x TX_FULL=%x\r\n", status, (status & _BV(RX_DR)) ? 1 : 0,
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(status & _BV(TX_DS)) ? 1 : 0, (status & _BV(MAX_RT)) ? 1 : 0, ((status >> RX_P_NO) & 0x07), (status & _BV(TX_FULL)) ? 1 : 0);
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}
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void Nrf24_print_address_register(NRF24_t * dev, const char* name, uint8_t reg, uint8_t qty)
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|
{
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|
printf("%s\t =",name);
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while (qty--) {
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//uint8_t buffer[addr_width];
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|
uint8_t buffer[5];
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Nrf24_readRegister(dev, reg++, buffer, sizeof(buffer));
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|
|
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printf(" 0x");
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|
#if 0
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|
uint8_t* bufptr = buffer + sizeof buffer;
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|
while (--bufptr >= buffer) {
|
|
printf("%02x", *bufptr);
|
|
}
|
|
#endif
|
|
for(int i=0;i<5;i++) {
|
|
printf("%02x", buffer[i]);
|
|
}
|
|
}
|
|
printf("\r\n");
|
|
}
|
|
|
|
void Nrf24_print_byte_register(NRF24_t * dev, const char* name, uint8_t reg, uint8_t qty)
|
|
{
|
|
printf("%s\t =", name);
|
|
while (qty--) {
|
|
uint8_t buffer[1];
|
|
Nrf24_readRegister(dev, reg++, buffer, 1);
|
|
printf(" 0x%02x", buffer[0]);
|
|
}
|
|
printf("\r\n");
|
|
}
|
|
|
|
uint8_t Nrf24_getDataRate(NRF24_t * dev)
|
|
{
|
|
rf24_datarate_e result;
|
|
uint8_t dr;
|
|
Nrf24_readRegister(dev, RF_SETUP, &dr, sizeof(dr));
|
|
//printf("RF_SETUP=%x\n",dr);
|
|
dr = dr & (_BV(RF_DR_LOW) | _BV(RF_DR_HIGH));
|
|
|
|
// switch uses RAM (evil!)
|
|
// Order matters in our case below
|
|
if (dr == _BV(RF_DR_LOW)) {
|
|
// '10' = 250KBPS
|
|
result = RF24_250KBPS;
|
|
} else if (dr == _BV(RF_DR_HIGH)) {
|
|
// '01' = 2MBPS
|
|
result = RF24_2MBPS;
|
|
} else {
|
|
// '00' = 1MBPS
|
|
result = RF24_1MBPS;
|
|
}
|
|
return result;
|
|
}
|
|
|
|
char * Nrf24_getDataRateString(NRF24_t * dev)
|
|
{
|
|
return rf24_datarates[Nrf24_getDataRate(dev)];
|
|
}
|
|
|
|
uint8_t Nrf24_getCRCLength(NRF24_t * dev)
|
|
{
|
|
rf24_crclength_e result = RF24_CRC_DISABLED;
|
|
|
|
uint8_t config;
|
|
Nrf24_readRegister(dev, CONFIG, &config, sizeof(config));
|
|
//printf("CONFIG=%x\n",config);
|
|
config = config & (_BV(CRCO) | _BV(EN_CRC));
|
|
uint8_t AA;
|
|
Nrf24_readRegister(dev, EN_AA, &AA, sizeof(AA));
|
|
|
|
if (config & _BV(EN_CRC) || AA) {
|
|
if (config & _BV(CRCO)) {
|
|
result = RF24_CRC_16;
|
|
} else {
|
|
result = RF24_CRC_8;
|
|
}
|
|
}
|
|
|
|
return result;
|
|
}
|
|
|
|
uint8_t Nrf24_getPALevel(NRF24_t * dev)
|
|
{
|
|
uint8_t level;
|
|
Nrf24_readRegister(dev, RF_SETUP, &level, sizeof(level));
|
|
//printf("RF_SETUP=%x\n",level);
|
|
level = (level & (_BV(RF_PWR_LOW) | _BV(RF_PWR_HIGH))) >> 1;
|
|
return (level);
|
|
}
|
|
|
|
char * Nrf24_getPALevelString(NRF24_t * dev)
|
|
{
|
|
return rf24_pa_dbm[Nrf24_getPALevel(dev)];
|
|
}
|
|
|
|
uint8_t Nrf24_getRetransmitDelay(NRF24_t * dev)
|
|
{
|
|
uint8_t value;
|
|
Nrf24_readRegister(dev, SETUP_RETR, &value, 1);
|
|
return (value >> 4);
|
|
}
|
|
|
|
uint8_t Nrf24_getChannle(NRF24_t * dev)
|
|
{
|
|
return dev->channel;
|
|
}
|
|
|
|
uint8_t Nrf24_getPayload(NRF24_t * dev)
|
|
{
|
|
return dev->payload;
|
|
}
|