212 lines
5.8 KiB
C
212 lines
5.8 KiB
C
#ifndef MAIN_MIRF_H_
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#define MAIN_MIRF_H_
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#include "driver/spi_master.h"
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typedef struct {
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uint8_t PTX; //In sending mode.
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uint8_t cePin;// CE Pin controls RX / TX, default 8.
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uint8_t csnPin;//CSN Pin Chip Select Not, default 7.
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uint8_t channel;//Channel 0 - 127 or 0 - 84 in the US.
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uint8_t payload;// Payload width in bytes default 16 max 32.
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spi_device_handle_t _SPIHandle;
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uint8_t status;// Receive status
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} NRF24_t;
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/* Memory Map */
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#define CONFIG 0x00
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#define EN_AA 0x01
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#define EN_RXADDR 0x02
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#define SETUP_AW 0x03
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#define SETUP_RETR 0x04
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#define RF_CH 0x05
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#define RF_SETUP 0x06
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#define STATUS 0x07
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#define OBSERVE_TX 0x08
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#define CD 0x09
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#define RX_ADDR_P0 0x0A
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#define RX_ADDR_P1 0x0B
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#define RX_ADDR_P2 0x0C
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#define RX_ADDR_P3 0x0D
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#define RX_ADDR_P4 0x0E
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#define RX_ADDR_P5 0x0F
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#define TX_ADDR 0x10
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#define RX_PW_P0 0x11
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#define RX_PW_P1 0x12
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#define RX_PW_P2 0x13
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#define RX_PW_P3 0x14
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#define RX_PW_P4 0x15
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#define RX_PW_P5 0x16
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#define FIFO_STATUS 0x17
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#define DYNPD 0x1C
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#define FEATURE 0x1D
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/* Bit Mnemonics */
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#define MASK_RX_DR 6
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#define MASK_TX_DS 5
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#define MASK_MAX_RT 4
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#define EN_CRC 3
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#define CRCO 2
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#define PWR_UP 1
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#define PRIM_RX 0
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#define ENAA_P5 5
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#define ENAA_P4 4
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#define ENAA_P3 3
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#define ENAA_P2 2
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#define ENAA_P1 1
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#define ENAA_P0 0
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#define ERX_P5 5
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#define ERX_P4 4
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#define ERX_P3 3
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#define ERX_P2 2
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#define ERX_P1 1
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#define ERX_P0 0
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#define AW 0
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#define ARD 4
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#define ARC 0
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#define RF_DR_LOW 5
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#define PLL_LOCK 4
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#define RF_DR_HIGH 3
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#define RF_PWR 1
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#define LNA_HCURR 0
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#define RX_DR 6
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#define TX_DS 5
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#define MAX_RT 4
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#define RX_P_NO 1
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#define TX_FULL 0
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#define PLOS_CNT 4
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#define ARC_CNT 0
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#define TX_REUSE 6
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#define FIFO_FULL 5
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#define TX_EMPTY 4
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#define RX_FULL 1
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#define RX_EMPTY 0
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/* Instruction Mnemonics */
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#define R_REGISTER 0x00
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#define W_REGISTER 0x20
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#define REGISTER_MASK 0x1F
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#define R_RX_PAYLOAD 0x61
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#define W_TX_PAYLOAD 0xA0
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#define FLUSH_TX 0xE1
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#define FLUSH_RX 0xE2
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#define REUSE_TX_PL 0xE3
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#define NOP 0xFF
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/* Non-P omissions */
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#define LNA_HCURR 0
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/* P model memory Map */
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#define RPD 0x09
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#define W_TX_PAYLOAD_NO_ACK 0xB0
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/* P model bit Mnemonics */
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#define RF_DR_LOW 5
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#define RF_DR_HIGH 3
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#define RF_PWR_LOW 1
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#define RF_PWR_HIGH 2
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/* Device addrees length:3~5 bytes */
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#define mirf_ADDR_LEN 5
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/*
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enable interrupt caused by RX_DR.
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enable interrupt caused by TX_DS.
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enable interrupt caused by MAX_RT.
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enable CRC and CRC data len=1
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mirf_CONFIG = 00001000B
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*/
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//#define mirf_CONFIG ((1<<EN_CRC) | (0<<CRCO) )
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/*
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enable interrupt caused by RX_DR.
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disable interrupt caused by TX_DS.
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enable interrupt caused by MAX_RT.
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enable CRC and CRC data len=1
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mirf_CONFIG == 00101000B
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*/
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#define mirf_CONFIG ((1<<MASK_TX_DS) | (1<<EN_CRC) | (0<<CRCO) )
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/**
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* Power Amplifier level.
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*
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* For use with setPALevel()
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*/
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typedef enum {
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RF24_PA_MIN = 0,
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RF24_PA_LOW,
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RF24_PA_HIGH,
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RF24_PA_MAX,
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RF24_PA_ERROR
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} rf24_pa_dbm_e;
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/**
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* Data rate. How fast data moves through the air.
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*
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* For use with setDataRate()
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*/
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typedef enum {
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RF24_1MBPS = 0,
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RF24_2MBPS,
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RF24_250KBPS
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} rf24_datarate_e;
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/**
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* CRC Length. How big (if any) of a CRC is included.
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*
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* For use with setCRCLength()
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*/
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typedef enum {
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RF24_CRC_DISABLED = 0,
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RF24_CRC_8,
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RF24_CRC_16
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} rf24_crclength_e;
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void Nrf24_init(NRF24_t * dev);
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bool spi_write_byte(NRF24_t * dev, uint8_t* Dataout, size_t DataLength );
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bool spi_read_byte(NRF24_t * dev, uint8_t* Datain, uint8_t* Dataout, size_t DataLength );
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uint8_t spi_transfer(NRF24_t * dev, uint8_t address);
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void spi_csnLow(NRF24_t * dev);
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void spi_csnHi(NRF24_t * dev);
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void Nrf24_config(NRF24_t * dev, uint8_t channel, uint8_t payload);
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void Nrf24_send(NRF24_t * dev, uint8_t *value);
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esp_err_t Nrf24_setRADDR(NRF24_t * dev, uint8_t * adr);
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esp_err_t Nrf24_setTADDR(NRF24_t * dev, uint8_t * adr);
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void Nrf24_addRADDR(NRF24_t * dev, uint8_t pipe, uint8_t adr);
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bool Nrf24_dataReady(NRF24_t * dev);
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uint8_t Nrf24_getDataPipe(NRF24_t * dev);
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bool Nrf24_isSending(NRF24_t * dev);
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bool Nrf24_isSend(NRF24_t * dev, int timeout);
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bool Nrf24_rxFifoEmpty(NRF24_t * dev);
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bool Nrf24_txFifoEmpty(NRF24_t * dev);
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void Nrf24_getData(NRF24_t * dev, uint8_t * data);
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uint8_t Nrf24_getStatus(NRF24_t * dev);
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void Nrf24_configRegister(NRF24_t * dev, uint8_t reg, uint8_t value);
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void Nrf24_readRegister(NRF24_t * dev, uint8_t reg, uint8_t * value, uint8_t len);
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void Nrf24_writeRegister(NRF24_t * dev, uint8_t reg, uint8_t * value, uint8_t len);
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void Nrf24_powerUpRx(NRF24_t * dev);
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void Nrf24_powerUpTx(NRF24_t * dev);
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void Nrf24_powerDown(NRF24_t * dev);
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void Nrf24_SetOutputRF_PWR(NRF24_t * dev, uint8_t val);
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void Nrf24_SetSpeedDataRates(NRF24_t * dev, uint8_t val);
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void Nrf24_setRetransmitDelay(NRF24_t * dev, uint8_t val);
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void Nrf24_ceHi(NRF24_t * dev);
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void Nrf24_ceLow(NRF24_t * dev);
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void Nrf24_flushRx(NRF24_t * dev);
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void Nrf24_printDetails(NRF24_t * dev);
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void Nrf24_print_status(uint8_t status);
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void Nrf24_print_address_register(NRF24_t * dev, const char* name, uint8_t reg, uint8_t qty);
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void Nrf24_print_byte_register(NRF24_t * dev, const char* name, uint8_t reg, uint8_t qty);
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uint8_t Nrf24_getDataRate(NRF24_t * dev);
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char * Nrf24_getDataRateString(NRF24_t * dev);
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uint8_t Nrf24_getCRCLength(NRF24_t * dev);
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uint8_t Nrf24_getPALevel(NRF24_t * dev);
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char * Nrf24_getPALevelString(NRF24_t * dev);
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uint8_t Nrf24_getRetransmitDelay(NRF24_t * dev);
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uint8_t Nrf24_getChannle(NRF24_t * dev);
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uint8_t Nrf24_getPayload(NRF24_t * dev);
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#endif /* MAIN_MIRF_H_ */
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