This commit is contained in:
2025-08-10 11:19:30 +03:00
parent a0873bbe36
commit 74408d8f32
2 changed files with 57 additions and 50 deletions

View File

@@ -4,9 +4,6 @@
#include "event_groups.h" #include "event_groups.h"
#include "avr/io.h" #include "avr/io.h"
#include "avr/interrupt.h" #include "avr/interrupt.h"
// #include "stdlib.h"
// #include "stdint.h"
// #include "string.h"
#include "stdbool.h" #include "stdbool.h"
#include "stdio.h" #include "stdio.h"
@@ -37,7 +34,8 @@ extern "C"
avr_err_t zh_avr_i2c_master_probe(const uint8_t addr, TickType_t xTicksToWait); avr_err_t zh_avr_i2c_master_probe(const uint8_t addr, TickType_t xTicksToWait);
avr_err_t zh_avr_i2c_master_transmit(const uint8_t addr, uint8_t *data, uint8_t size, TickType_t xTicksToWait); avr_err_t zh_avr_i2c_master_transmit(const uint8_t addr, uint8_t *data, uint8_t size, TickType_t xTicksToWait);
avr_err_t zh_avr_i2c_master_receive(const uint8_t addr, uint8_t *data, uint8_t size, TickType_t xTicksToWait); avr_err_t zh_avr_i2c_master_receive(const uint8_t addr, uint8_t *data, uint8_t size, TickType_t xTicksToWait);
avr_err_t zh_avr_i2c_master_transmit_receive(const uint8_t addr, uint8_t *write_data, uint8_t write_size, uint8_t *read_data, uint8_t read_size, size_t delay); avr_err_t zh_avr_i2c_master_transmit_register(const uint8_t addr, uint16_t *reg, uint8_t *data, uint8_t size, TickType_t xTicksToWait);
avr_err_t zh_avr_i2c_master_receive_register(const uint8_t addr, uint16_t *reg, uint8_t *data, uint8_t size, TickType_t xTicksToWait);
#ifdef __cplusplus #ifdef __cplusplus
} }

View File

@@ -29,10 +29,9 @@ avr_err_t _zh_avr_i2c_master_start(TickType_t xTicksToWait);
static EventGroupHandle_t _event_group_handle = NULL; static EventGroupHandle_t _event_group_handle = NULL;
static uint8_t _target_i2c_address = 0; static uint8_t _target_i2c_address = 0;
volatile static uint8_t _work_mode = 0; volatile static uint8_t _work_mode = 0;
volatile static uint8_t *_master_data = NULL;
volatile static uint8_t *_master_tx_data = NULL; volatile static uint8_t _master_data_size = 0;
volatile static uint8_t _master_tx_data_size = 0; static bool _master_is_initialized = false;
volatile static uint8_t _master_tx_data_counter = 0;
avr_err_t zh_avr_i2c_master_init(const bool pullup) avr_err_t zh_avr_i2c_master_init(const bool pullup)
{ {
@@ -47,41 +46,51 @@ avr_err_t zh_avr_i2c_master_init(const bool pullup)
TWBR = ((F_CPU / 100000) - 16) / 2; TWBR = ((F_CPU / 100000) - 16) / 2;
TWSR = 0xF8; TWSR = 0xF8;
sei(); sei();
_master_is_initialized = true;
return AVR_OK; return AVR_OK;
} }
avr_err_t zh_avr_i2c_master_probe(const uint8_t addr, TickType_t xTicksToWait) avr_err_t zh_avr_i2c_master_probe(const uint8_t addr, TickType_t xTicksToWait)
{ {
_work_mode = MASTER_PROBE; // ZH_ERROR_CHECK(_master_is_initialized == true, AVR_ERR_INVALID_STATE);
_target_i2c_address = addr; // _work_mode = MASTER_PROBE;
return _zh_avr_i2c_master_start(xTicksToWait); // _target_i2c_address = addr;
// return _zh_avr_i2c_master_start(xTicksToWait);
uint8_t temp = 0;
return zh_avr_i2c_master_transmit(addr, &temp, 1, xTicksToWait);
} }
avr_err_t zh_avr_i2c_master_transmit(const uint8_t addr, uint8_t *data, uint8_t size, TickType_t xTicksToWait) avr_err_t zh_avr_i2c_master_transmit(const uint8_t addr, uint8_t *data, uint8_t size, TickType_t xTicksToWait)
{ {
ZH_ERROR_CHECK(data != NULL || size > 0, AVR_ERR_INVALID_ARG); ZH_ERROR_CHECK(data != NULL || size > 0, AVR_ERR_INVALID_ARG);
ZH_ERROR_CHECK(_master_is_initialized == true, AVR_ERR_INVALID_STATE);
_work_mode = MASTER_WRITE; _work_mode = MASTER_WRITE;
_target_i2c_address = addr; _target_i2c_address = addr;
_master_tx_data = data; _master_data = data;
_master_tx_data_size = size; _master_data_size = size;
_master_tx_data_counter = 0;
return _zh_avr_i2c_master_start(xTicksToWait); return _zh_avr_i2c_master_start(xTicksToWait);
} }
avr_err_t zh_avr_i2c_master_receive(const uint8_t addr, uint8_t *data, uint8_t size, TickType_t xTicksToWait) avr_err_t zh_avr_i2c_master_receive(const uint8_t addr, uint8_t *data, uint8_t size, TickType_t xTicksToWait)
{ {
ZH_ERROR_CHECK(data != NULL || size > 0, AVR_ERR_INVALID_ARG); ZH_ERROR_CHECK(data != NULL || size > 0, AVR_ERR_INVALID_ARG);
ZH_ERROR_CHECK(_master_is_initialized == true, AVR_ERR_INVALID_STATE);
_work_mode = MASTER_READ; _work_mode = MASTER_READ;
_target_i2c_address = addr; _target_i2c_address = addr;
_master_tx_data = data; _master_data = data;
_master_tx_data_size = size; _master_data_size = size;
_master_tx_data_counter = 0;
return _zh_avr_i2c_master_start(xTicksToWait); return _zh_avr_i2c_master_start(xTicksToWait);
} }
avr_err_t zh_avr_i2c_master_transmit_receive(const uint8_t addr, uint8_t *write_data, uint8_t write_size, uint8_t *read_data, uint8_t read_size, size_t delay) avr_err_t zh_avr_i2c_master_transmit_register(const uint8_t addr, uint16_t *reg, uint8_t *data, uint8_t size, TickType_t xTicksToWait)
{ {
return AVR_OK; // To Do.
return _zh_avr_i2c_master_start(xTicksToWait);
}
avr_err_t zh_avr_i2c_master_receive_register(const uint8_t addr, uint16_t *reg, uint8_t *data, uint8_t size, TickType_t xTicksToWait)
{
// To Do.
return _zh_avr_i2c_master_start(xTicksToWait);
} }
avr_err_t _zh_avr_i2c_master_start(TickType_t xTicksToWait) avr_err_t _zh_avr_i2c_master_start(TickType_t xTicksToWait)
@@ -108,12 +117,12 @@ ISR(TWI_vect)
switch (TWSR & 0xF8) switch (TWSR & 0xF8)
{ {
case 0x00: // Bus error. case 0x00: // Bus error.
printf("00\n"); // printf("00\n");
TWCR = I2C_START | (1 << TWSTO); TWCR = I2C_START | (1 << TWSTO);
xEventGroupSetBitsFromISR(_event_group_handle, I2C_BUS_FAIL, &xHigherPriorityTaskWoken); xEventGroupSetBitsFromISR(_event_group_handle, I2C_BUS_FAIL, &xHigherPriorityTaskWoken);
break; break;
case 0x08: // A START condition has been transmitted. case 0x08: // A START condition has been transmitted.
printf("08\n"); // printf("08\n");
switch (_work_mode) switch (_work_mode)
{ {
case MASTER_WRITE: case MASTER_WRITE:
@@ -131,52 +140,51 @@ ISR(TWI_vect)
TWCR = I2C_START; TWCR = I2C_START;
break; break;
case 0x10: // A repeated START condition has been transmitted. case 0x10: // A repeated START condition has been transmitted.
printf("10\n"); // printf("10\n");
// TWCR = I2C_START | (1 << TWSTO); // TWCR = I2C_START | (1 << TWSTO);
break; break;
case 0x18: // SLA+W has been transmitted. ACK has been received. case 0x18: // SLA+W has been transmitted. ACK has been received.
printf("18\n"); // printf("18\n");
TWDR = *(_master_tx_data++); TWDR = *(_master_data++);
_master_tx_data_counter++; --_master_data_size;
TWCR = I2C_START; TWCR = I2C_START;
break; break;
case 0x20: // SLA+W has been transmitted. NOT ACK has been received. case 0x20: // SLA+W has been transmitted. NACK has been received.
printf("20\n"); // printf("20\n");
TWCR = I2C_START | (1 << TWSTO); TWCR = I2C_START | (1 << TWSTO);
xEventGroupSetBitsFromISR(_event_group_handle, I2C_NACK, &xHigherPriorityTaskWoken); xEventGroupSetBitsFromISR(_event_group_handle, I2C_NACK, &xHigherPriorityTaskWoken);
break; break;
case 0x28: // Data byte has been transmitted. ACK has been received. case 0x28: // Data byte has been transmitted. ACK has been received.
printf("28\n"); // printf("28\n");
if (_master_tx_data_counter < _master_tx_data_size) if (_master_data_size-- == 0)
{
TWDR = *(_master_tx_data++);
_master_tx_data_counter++;
TWCR = I2C_START;
}
else
{ {
TWCR = I2C_START | (1 << TWSTO); TWCR = I2C_START | (1 << TWSTO);
xEventGroupSetBitsFromISR(_event_group_handle, I2C_OK, &xHigherPriorityTaskWoken); xEventGroupSetBitsFromISR(_event_group_handle, I2C_OK, &xHigherPriorityTaskWoken);
} }
else
{
TWDR = *(_master_data++);
TWCR = I2C_START;
}
break; break;
case 0x30: // Data byte has been transmitted. NOT ACK has been received. case 0x30: // Data byte has been transmitted. NACK has been received.
printf("30\n"); // printf("30\n");
TWCR = I2C_START | (1 << TWSTO); TWCR = I2C_START | (1 << TWSTO);
xEventGroupSetBitsFromISR(_event_group_handle, I2C_NACK, &xHigherPriorityTaskWoken); xEventGroupSetBitsFromISR(_event_group_handle, I2C_NACK, &xHigherPriorityTaskWoken);
break; break;
case 0x38: // Arbitration lost in SLA+W or data bytes. Arbitration lost in SLA+R or NOT ACK bit. case 0x38: // Arbitration lost in SLA+W or data bytes. Arbitration lost in SLA+R or NACK bit.
printf("38\n"); // printf("38\n");
TWCR = I2C_START | (1 << TWSTO); TWCR = I2C_START | (1 << TWSTO);
xEventGroupSetBitsFromISR(_event_group_handle, I2C_COLLISION, &xHigherPriorityTaskWoken); xEventGroupSetBitsFromISR(_event_group_handle, I2C_COLLISION, &xHigherPriorityTaskWoken);
break; break;
case 0x40: // SLA+R has been transmitted. ACK has been received. case 0x40: // SLA+R has been transmitted. ACK has been received.
printf("40\n"); // printf("40\n");
switch (_work_mode) switch (_work_mode)
{ {
case MASTER_WRITE: case MASTER_WRITE:
break; break;
case MASTER_READ: case MASTER_READ:
if (_master_tx_data_size == 1) if (_master_data_size == 1)
{ {
TWCR = I2C_START; TWCR = I2C_START;
} }
@@ -190,22 +198,23 @@ ISR(TWI_vect)
case MASTER_READ_REG: case MASTER_READ_REG:
break; break;
case MASTER_PROBE: case MASTER_PROBE:
TWCR = I2C_START | (1 << TWSTO); // TWCR = I2C_START | (1 << TWSTO);
TWCR = I2C_START;
xEventGroupSetBitsFromISR(_event_group_handle, I2C_OK, &xHigherPriorityTaskWoken); xEventGroupSetBitsFromISR(_event_group_handle, I2C_OK, &xHigherPriorityTaskWoken);
break; break;
default: default:
break; break;
} }
break; break;
case 0x48: // SLA+R has been transmitted. NOT ACK has been received. case 0x48: // SLA+R has been transmitted. NACK has been received.
printf("48\n"); // printf("48\n");
TWCR = I2C_START | (1 << TWSTO); TWCR = I2C_START | (1 << TWSTO);
xEventGroupSetBitsFromISR(_event_group_handle, I2C_NACK, &xHigherPriorityTaskWoken); xEventGroupSetBitsFromISR(_event_group_handle, I2C_NACK, &xHigherPriorityTaskWoken);
break; break;
case 0x50: // Data byte has been received. ACK has been returned. case 0x50: // Data byte has been received. ACK has been returned.
printf("50\n"); // printf("50\n");
*(_master_tx_data++) = TWDR; *(_master_data++) = TWDR;
if (--_master_tx_data_size == 1) if (--_master_data_size == 1)
{ {
TWCR = I2C_START; TWCR = I2C_START;
} }
@@ -214,9 +223,9 @@ ISR(TWI_vect)
TWCR = I2C_START | (1 << TWEA); TWCR = I2C_START | (1 << TWEA);
} }
break; break;
case 0x58: // Data byte has been received. NOT ACK has been returned. case 0x58: // Data byte has been received. NACK has been returned.
printf("58\n"); // printf("58\n");
*(_master_tx_data) = TWDR; *(_master_data) = TWDR;
TWCR = I2C_START | (1 << TWSTO); TWCR = I2C_START | (1 << TWSTO);
xEventGroupSetBitsFromISR(_event_group_handle, I2C_OK, &xHigherPriorityTaskWoken); xEventGroupSetBitsFromISR(_event_group_handle, I2C_OK, &xHigherPriorityTaskWoken);
break; break;