avr_libraries/zh_avr_pcf8574
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Alexey Zholtikov
2025-08-12 08:53:40 +03:00
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README.md
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# zh_avr_pcf8574
# FreeRTOS based AVR library for PCF8574(A) 8-bit I/O expander
AVR library for PCF8574(A) 8-bit I/O expander.
## Features
1. Support of 16 expanders on one bus.
2. Support of output and input GPIO's work mode.
3. Support of interrupts from input GPIO's.
## Note
1. Enable interrupt support only if input GPIO's are used.
2. All the INT GPIO's on the extenders must be connected to the one GPIO on AVR. Only PORTD4 - PORTD7 are acceptable!
3. The input GPIO's are always pullup to the power supply.
## Dependencies
1. [zh_avr_free_rtos](http://git.zh.com.ru/avr_libraries/zh_avr_free_rtos)
2. [zh_avr_vector](http://git.zh.com.ru/avr_libraries/zh_avr_vector)
3. [zh_avr_common](http://git.zh.com.ru/avr_libraries/zh_avr_common)
4. [zh_avr_i2c](http://git.zh.com.ru/avr_libraries/zh_avr_i2c)
## Using
In an existing project, run the following command to install the components:
```text
cd ../your_project/lib
git clone http://git.zh.com.ru/avr_libraries/zh_avr_free_rtos
git clone http://git.zh.com.ru/avr_libraries/zh_avr_vector
git clone http://git.zh.com.ru/avr_libraries/zh_avr_i2c
git clone http://git.zh.com.ru/avr_libraries/zh_avr_common
git clone http://git.zh.com.ru/avr_libraries/zh_avr_pcf8574
```
In the application, add the component:
```c
#include "zh_avr_pcf8574.h"
```
## Examples
One expander on bus. All GPIO's as output (except P0 - input). Interrupt is enable:
```c
#include "avr/io.h"
#include "stdio.h"
#include "zh_avr_pcf8574.h"
#define BAUD_RATE 9600
#define BAUD_PRESCALE (F_CPU / 16 / BAUD_RATE - 1)
int usart(char byte, FILE *stream)
{
while ((UCSR0A & (1 << UDRE0)) == 0)
{
}
UDR0 = byte;
return 0;
}
FILE uart = FDEV_SETUP_STREAM(usart, NULL, _FDEV_SETUP_WRITE);
zh_avr_pcf8574_handle_t pcf8574_handle = {0};
void print_gpio_status(const char *message, uint8_t reg)
{
printf("%s", message);
for (uint8_t i = 0; i < 8; ++i)
{
printf("%c", (reg & 0x80) ? '1' : '0');
reg <<= 1;
}
printf(".\n");
}
void pcf8574_example_task(void *pvParameters)
{
zh_avr_i2c_master_init(false);
zh_avr_pcf8574_init_config_t pcf8574_init_config = ZH_AVR_PCF8574_INIT_CONFIG_DEFAULT();
pcf8574_init_config.i2c_address = 0x38;
pcf8574_init_config.p0_gpio_work_mode = true; // Required only for input GPIO.
pcf8574_init_config.interrupt_gpio = PORTD4; // Required only if used input GPIO interrupts.
zh_avr_pcf8574_init(&pcf8574_init_config, &pcf8574_handle);
uint8_t reg = 0;
zh_avr_pcf8574_read(&pcf8574_handle, &reg);
print_gpio_status("GPIO status: ", reg);
printf("Set P7 to 1, P1 to 1 and P0 to 0.\n");
zh_avr_pcf8574_write(&pcf8574_handle, 0b10000010); // GPIO P0 will not be changed because it is operating in input mode.
zh_avr_pcf8574_read(&pcf8574_handle, &reg);
print_gpio_status("GPIO status: ", reg);
printf("Sets P0 to 0.\n");
zh_avr_pcf8574_write_gpio(&pcf8574_handle, 0, false); // GPIO P0 will not be changed because it is operating in input mode.
bool gpio = 0;
zh_avr_pcf8574_read_gpio(&pcf8574_handle, 0, &gpio);
printf("P0 status: %d.\n", gpio);
printf("Set P1 to 0.\n");
zh_avr_pcf8574_write_gpio(&pcf8574_handle, 1, false);
zh_avr_pcf8574_read_gpio(&pcf8574_handle, 1, &gpio);
printf("P1 status: %d.\n", gpio);
zh_avr_pcf8574_read(&pcf8574_handle, &reg);
print_gpio_status("GPIO status: ", reg);
printf("Reset all GPIO.\n");
zh_avr_pcf8574_reset(&pcf8574_handle);
zh_avr_pcf8574_read(&pcf8574_handle, &reg);
print_gpio_status("GPIO status: ", reg);
printf("Task Remaining Stack Size %d.\n", uxTaskGetStackHighWaterMark(NULL));
vTaskDelete(NULL);
}
int main(void)
{
UBRR0H = (BAUD_PRESCALE >> 8);
UBRR0L = BAUD_PRESCALE;
UCSR0B = (1 << RXEN0) | (1 << TXEN0);
UCSR0C = (1 << UCSZ01) | (1 << UCSZ00);
stdout = &uart;
xTaskCreate(pcf8574_example_task, "pcf8574 example task", 124, NULL, tskIDLE_PRIORITY, NULL);
vTaskStartScheduler();
return 0;
}
void zh_avr_pcf8574_event_handler(zh_avr_pcf8574_event_on_isr_t *event) // Required only if used input GPIO interrupts.
{
printf("Interrupt happened on device address 0x%02X on GPIO number %d at level %d.\n", event->i2c_address, event->gpio_number, event->gpio_level);
printf("Interrupt Task Remaining Stack Size %d.\n", uxTaskGetStackHighWaterMark(NULL));
}
ISR(PCINT2_vect) // Required only if used input GPIO interrupts.
{
zh_avr_pcf8574_isr_handler();
}
```

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include/zh_avr_pcf8574.h Normal file
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#pragma once
#include "FreeRTOS.h"
#include "semphr.h"
#include "zh_avr_i2c.h"
#include "zh_avr_vector.h"
#include "avr_err.h"
#include "avr_bit_defs.h"
#define ZH_AVR_PCF8574_INIT_CONFIG_DEFAULT() \
{ \
.task_priority = configMAX_PRIORITIES, \
.stack_size = 124, \
.i2c_address = 0xFF, \
.p0_gpio_work_mode = 0, \
.p1_gpio_work_mode = 0, \
.p2_gpio_work_mode = 0, \
.p3_gpio_work_mode = 0, \
.p4_gpio_work_mode = 0, \
.p5_gpio_work_mode = 0, \
.p6_gpio_work_mode = 0, \
.p7_gpio_work_mode = 0, \
.interrupt_gpio = 0xFF}
#ifdef __cplusplus
extern "C"
{
#endif
typedef struct // Structure for initial initialization of PCF8574 expander.
{
uint8_t task_priority; // Task priority for the PCF8574 expander isr processing. @note It is not recommended to set a value less than configMAX_PRIORITIES.
uint8_t stack_size; // Stack size for task for the PCF8574 expander isr processing processing. @note The minimum size is 124 byte.
uint8_t i2c_address; // Expander I2C address.
bool p0_gpio_work_mode; // Expander GPIO PO work mode. True for input, false for output.
bool p1_gpio_work_mode; // Expander GPIO P1 work mode. True for input, false for output.
bool p2_gpio_work_mode; // Expander GPIO P2 work mode. True for input, false for output.
bool p3_gpio_work_mode; // Expander GPIO P3 work mode. True for input, false for output.
bool p4_gpio_work_mode; // Expander GPIO P4 work mode. True for input, false for output.
bool p5_gpio_work_mode; // Expander GPIO P5 work mode. True for input, false for output.
bool p6_gpio_work_mode; // Expander GPIO P6 work mode. True for input, false for output.
bool p7_gpio_work_mode; // Expander GPIO P7 work mode. True for input, false for output.
uint8_t interrupt_gpio; // Interrupt GPIO. @attention Must be same for all PCF8574 expanders.
} zh_avr_pcf8574_init_config_t;
typedef struct // PCF8574 expander handle.
{
uint8_t i2c_address; // Expander I2C address.
uint8_t gpio_work_mode; // Expander GPIO's work mode.
uint8_t gpio_status; // Expander GPIO's status.
bool is_initialized; // Expander initialization flag.
void *system; // System pointer for use in another components.
} zh_avr_pcf8574_handle_t;
typedef struct // Structure for sending data to the event handler when cause an interrupt.
{
uint8_t i2c_address; // The i2c address of PCF8574 expander that caused the interrupt.
uint8_t gpio_number; // The GPIO that caused the interrupt.
bool gpio_level; // The GPIO level that caused the interrupt.
} zh_avr_pcf8574_event_on_isr_t;
/**
* @brief Initialize PCF8574 expander.
*
* @param[in] config Pointer to PCF8574 initialized configuration structure. Can point to a temporary variable.
* @param[out] handle Pointer to unique PCF8574 handle.
*
* @attention I2C driver must be initialized first.
*
* @note Before initialize the expander recommend initialize zh_avr_pcf8574_init_config_t structure with default values.
*
* @code zh_avr_pcf8574_init_config_t config = ZH_AVR_PCF8574_INIT_CONFIG_DEFAULT() @endcode
*
* @return AVR_OK if success or an error code otherwise.
*/
avr_err_t zh_avr_pcf8574_init(const zh_avr_pcf8574_init_config_t *config, zh_avr_pcf8574_handle_t *handle);
/**
* @brief Read PCF8574 all GPIO's status.
*
* @param[in] handle Pointer to unique PCF8574 handle.
* @param[out] reg Pointer to GPIO's status.
*
* @return AVR_OK if success or an error code otherwise.
*/
avr_err_t zh_avr_pcf8574_read(zh_avr_pcf8574_handle_t *handle, uint8_t *reg);
/**
* @brief Set PCF8574 all GPIO's status.
*
* @param[in] handle Pointer to unique PCF8574 handle.
* @param[in] reg GPIO's status.
*
* @attention Only the GPIO outputs are affected.
*
* @return AVR_OK if success or an error code otherwise.
*/
avr_err_t zh_avr_pcf8574_write(zh_avr_pcf8574_handle_t *handle, uint8_t reg);
/**
* @brief Reset (set to initial) PCF8574 all GPIO's.
*
* @param[in] handle Pointer to unique PCF8574 handle.
*
* @return AVR_OK if success or an error code otherwise.
*/
avr_err_t zh_avr_pcf8574_reset(zh_avr_pcf8574_handle_t *handle);
/**
* @brief Read PCF8574 GPIO status.
*
* @param[in] handle Pointer to unique PCF8574 handle.
* @param[in] gpio GPIO number.
* @param[out] status Pointer to GPIO status (true - HIGH, false - LOW).
*
* @return AVR_OK if success or an error code otherwise.
*/
avr_err_t zh_avr_pcf8574_read_gpio(zh_avr_pcf8574_handle_t *handle, uint8_t gpio, bool *status);
/**
* @brief Set PCF8574 GPIO status.
*
* @param[in] handle Pointer to unique PCF8574 handle.
* @param[in] gpio GPIO number.
* @param[in] status GPIO status (true - HIGH, false - LOW).
*
* @attention Only the GPIO output is affected.
*
* @return AVR_OK if success or an error code otherwise.
*/
avr_err_t zh_avr_pcf8574_write_gpio(zh_avr_pcf8574_handle_t *handle, uint8_t gpio, bool status);
/**
* @brief PCF8574 ISR handler.
*/
void zh_avr_pcf8574_isr_handler(void);
#ifdef __cplusplus
}
#endif

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version.txt Normal file
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1.0.0

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zh_avr_pcf8574.c Normal file
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#include "zh_avr_pcf8574.h"
static uint8_t _interrupt_gpio = 0xFF;
static SemaphoreHandle_t _interrupt_semaphore = NULL;
static uint8_t _gpio_matrix[8] = {AVR_BIT0, AVR_BIT1, AVR_BIT2, AVR_BIT3, AVR_BIT4, AVR_BIT5, AVR_BIT6, AVR_BIT7};
static zh_avr_vector_t _vector = {0};
static avr_err_t _zh_avr_pcf8574_validate_config(const zh_avr_pcf8574_init_config_t *config);
static avr_err_t _zh_avr_pcf8574_configure_i2c_device(const zh_avr_pcf8574_init_config_t *config, zh_avr_pcf8574_handle_t *handle);
static avr_err_t _zh_avr_pcf8574_configure_interrupts(const zh_avr_pcf8574_init_config_t *config, zh_avr_pcf8574_handle_t handle);
static void _zh_avr_pcf8574_isr_processing_task(void *pvParameter);
static avr_err_t _zh_avr_pcf8574_read_register(zh_avr_pcf8574_handle_t *handle, uint8_t *reg);
static avr_err_t _zh_avr_pcf8574_write_register(zh_avr_pcf8574_handle_t *handle, uint8_t reg);
avr_err_t zh_avr_pcf8574_init(const zh_avr_pcf8574_init_config_t *config, zh_avr_pcf8574_handle_t *handle)
{
ZH_ERROR_CHECK(handle != NULL, AVR_ERR_INVALID_ARG);
ZH_ERROR_CHECK(handle->is_initialized == false, AVR_ERR_INVALID_STATE);
avr_err_t err = _zh_avr_pcf8574_validate_config(config);
ZH_ERROR_CHECK(err == AVR_OK, err);
err = _zh_avr_pcf8574_configure_i2c_device(config, handle);
ZH_ERROR_CHECK(err == AVR_OK, err);
err = _zh_avr_pcf8574_write_register(handle, handle->gpio_work_mode);
if (err != AVR_OK)
{
handle->is_initialized = false;
return err;
}
if (config->interrupt_gpio != 0xFF && handle->gpio_work_mode != 0)
{
err = _zh_avr_pcf8574_configure_interrupts(config, *handle);
if (err != AVR_OK)
{
handle->is_initialized = false;
return err;
}
}
handle->is_initialized = true;
return AVR_OK;
}
avr_err_t zh_avr_pcf8574_read(zh_avr_pcf8574_handle_t *handle, uint8_t *reg)
{
return _zh_avr_pcf8574_read_register(handle, reg);
}
avr_err_t zh_avr_pcf8574_write(zh_avr_pcf8574_handle_t *handle, uint8_t reg)
{
return _zh_avr_pcf8574_write_register(handle, (reg | handle->gpio_work_mode));
}
avr_err_t zh_avr_pcf8574_reset(zh_avr_pcf8574_handle_t *handle)
{
return _zh_avr_pcf8574_write_register(handle, handle->gpio_work_mode);
}
avr_err_t zh_avr_pcf8574_read_gpio(zh_avr_pcf8574_handle_t *handle, uint8_t gpio, bool *status)
{
ZH_ERROR_CHECK(gpio <= 7, AVR_FAIL);
uint8_t gpio_temp = _gpio_matrix[gpio];
uint8_t reg_temp = 0;
avr_err_t err = _zh_avr_pcf8574_read_register(handle, &reg_temp);
*status = ((reg_temp & gpio_temp) ? 1 : 0);
return err;
}
avr_err_t zh_avr_pcf8574_write_gpio(zh_avr_pcf8574_handle_t *handle, uint8_t gpio, bool status)
{
ZH_ERROR_CHECK(gpio <= 7, AVR_FAIL);
uint8_t gpio_temp = _gpio_matrix[gpio];
if (status == true)
{
return _zh_avr_pcf8574_write_register(handle, handle->gpio_status | handle->gpio_work_mode | gpio_temp);
}
return _zh_avr_pcf8574_write_register(handle, (handle->gpio_status ^ gpio_temp) | handle->gpio_work_mode);
}
static avr_err_t _zh_avr_pcf8574_validate_config(const zh_avr_pcf8574_init_config_t *config)
{
ZH_ERROR_CHECK(config != NULL, AVR_ERR_INVALID_ARG);
ZH_ERROR_CHECK((config->i2c_address >= 0x20 && config->i2c_address <= 0x27) || (config->i2c_address >= 0x38 && config->i2c_address <= 0x3F), AVR_ERR_INVALID_ARG);
ZH_ERROR_CHECK(config->task_priority > tskIDLE_PRIORITY && config->stack_size >= 124, AVR_ERR_INVALID_ARG);
ZH_ERROR_CHECK(config->interrupt_gpio == 0xFF || config->interrupt_gpio == PORTD4 || config->interrupt_gpio == PORTD5 || config->interrupt_gpio == PORTD6 || config->interrupt_gpio == PORTD7, AVR_ERR_INVALID_ARG);
return AVR_OK;
}
static avr_err_t _zh_avr_pcf8574_configure_i2c_device(const zh_avr_pcf8574_init_config_t *config, zh_avr_pcf8574_handle_t *handle)
{
avr_err_t err = zh_avr_i2c_master_probe(config->i2c_address, 1000 / portTICK_PERIOD_MS);
if (err != AVR_OK)
{
return err;
}
handle->gpio_work_mode = (config->p7_gpio_work_mode << 7) | (config->p6_gpio_work_mode << 6) | (config->p5_gpio_work_mode << 5) |
(config->p4_gpio_work_mode << 4) | (config->p3_gpio_work_mode << 3) | (config->p2_gpio_work_mode << 2) |
(config->p1_gpio_work_mode << 1) | (config->p0_gpio_work_mode << 0);
handle->gpio_status = handle->gpio_work_mode;
handle->i2c_address = config->i2c_address;
handle->is_initialized = true;
return AVR_OK;
}
static avr_err_t _zh_avr_pcf8574_configure_interrupts(const zh_avr_pcf8574_init_config_t *config, zh_avr_pcf8574_handle_t handle)
{
if (_interrupt_gpio != 0xFF)
{
avr_err_t err = zh_avr_vector_push_back(&_vector, &handle);
ZH_ERROR_CHECK(err == AVR_OK, err)
return AVR_OK;
}
_interrupt_gpio = config->interrupt_gpio;
avr_err_t err = zh_avr_vector_init(&_vector, sizeof(zh_avr_pcf8574_handle_t));
ZH_ERROR_CHECK(err == AVR_OK, err);
err = zh_avr_vector_push_back(&_vector, &handle);
ZH_ERROR_CHECK(err == AVR_OK, err);
DDRD &= ~(1 << _interrupt_gpio);
PORTD |= (1 << _interrupt_gpio);
PCICR |= (1 << PCIE2);
PCMSK2 |= (1 << _interrupt_gpio);
_interrupt_semaphore = xSemaphoreCreateBinary();
ZH_ERROR_CHECK(_interrupt_semaphore != NULL, AVR_ERR_NO_MEM);
BaseType_t x_err = xTaskCreate(_zh_avr_pcf8574_isr_processing_task, NULL, config->stack_size, NULL, config->task_priority, NULL);
if (x_err != pdPASS)
{
vSemaphoreDelete(_interrupt_semaphore);
return AVR_FAIL;
}
return AVR_OK;
}
void zh_avr_pcf8574_isr_handler(void)
{
if ((PIND & (1 << _interrupt_gpio)) == 0)
{
BaseType_t xHigherPriorityTaskWoken = pdFALSE;
xSemaphoreGiveFromISR(_interrupt_semaphore, &xHigherPriorityTaskWoken);
if (xHigherPriorityTaskWoken == pdTRUE)
{
portYIELD();
};
}
}
static void _zh_avr_pcf8574_isr_processing_task(void *pvParameter)
{
for (;;)
{
xSemaphoreTake(_interrupt_semaphore, portMAX_DELAY);
for (uint8_t i = 0; i < zh_avr_vector_get_size(&_vector); ++i)
{
zh_avr_pcf8574_handle_t *handle = zh_avr_vector_get_item(&_vector, i);
if (handle == NULL)
{
continue;
}
zh_avr_pcf8574_event_on_isr_t event = {0};
event.i2c_address = handle->i2c_address;
event.gpio_number = 0xFF;
uint8_t old_reg = handle->gpio_status;
uint8_t new_reg = 0;
avr_err_t err = _zh_avr_pcf8574_read_register(handle, &new_reg);
if (err != AVR_OK)
{
continue;
}
for (uint8_t j = 0; j <= 7; ++j)
{
if ((handle->gpio_work_mode & _gpio_matrix[j]) != 0)
{
if ((old_reg & _gpio_matrix[j]) != (new_reg & _gpio_matrix[j]))
{
event.gpio_number = j;
event.gpio_level = new_reg & _gpio_matrix[j];
extern void zh_avr_pcf8574_event_handler(zh_avr_pcf8574_event_on_isr_t * event);
zh_avr_pcf8574_event_handler(&event);
}
}
}
}
}
vTaskDelete(NULL);
}
static avr_err_t _zh_avr_pcf8574_read_register(zh_avr_pcf8574_handle_t *handle, uint8_t *reg)
{
ZH_ERROR_CHECK(handle != NULL || reg != NULL, AVR_ERR_INVALID_ARG);
ZH_ERROR_CHECK(handle->is_initialized == true, AVR_ERR_NOT_FOUND);
avr_err_t err = zh_avr_i2c_master_receive(handle->i2c_address, &handle->gpio_status, sizeof(handle->gpio_status), 1000 / portTICK_PERIOD_MS);
ZH_ERROR_CHECK(err == AVR_OK, err);
*reg = handle->gpio_status;
return AVR_OK;
}
static avr_err_t _zh_avr_pcf8574_write_register(zh_avr_pcf8574_handle_t *handle, uint8_t reg)
{
ZH_ERROR_CHECK(handle != NULL, AVR_ERR_INVALID_ARG);
ZH_ERROR_CHECK(handle->is_initialized == true, AVR_ERR_NOT_FOUND);
avr_err_t err = zh_avr_i2c_master_transmit(handle->i2c_address, &reg, sizeof(reg), 1000 / portTICK_PERIOD_MS);
ZH_ERROR_CHECK(err == AVR_OK, err);
handle->gpio_status = reg;
return AVR_OK;
}