mirror of
https://github.com/eclipse/upm.git
synced 2025-03-15 04:57:30 +03:00
styling: remove trailing whitespace from all modules
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
This commit is contained in:
parent
83c29cc330
commit
fdcd36e1ae
@ -94,12 +94,12 @@ TM1637::~TM1637() {
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}
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}
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}
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}
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maa_result_t
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maa_result_t
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TM1637::setBrightness (uint8_t level) {
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TM1637::setBrightness (uint8_t level) {
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m_brightness = level;
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m_brightness = level;
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}
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}
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maa_result_t
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maa_result_t
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TM1637::setSegments (const uint8_t segments[], uint8_t length, uint8_t pos) {
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TM1637::setSegments (const uint8_t segments[], uint8_t length, uint8_t pos) {
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start();
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start();
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writeByte(TM1637_I2C_COMM1);
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writeByte(TM1637_I2C_COMM1);
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@ -117,7 +117,7 @@ TM1637::setSegments (const uint8_t segments[], uint8_t length, uint8_t pos) {
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stop();
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stop();
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}
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}
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maa_result_t
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maa_result_t
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TM1637::write (std::string msg) {
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TM1637::write (std::string msg) {
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char leter = '\0';
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char leter = '\0';
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uint8_t data[] = { 0x0, 0x0, 0x0, 0x0 };
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uint8_t data[] = { 0x0, 0x0, 0x0, 0x0 };
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@ -131,7 +131,7 @@ TM1637::write (std::string msg) {
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setSegments(data);
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setSegments(data);
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}
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}
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maa_result_t
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maa_result_t
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TM1637::pinMode (maa_gpio_context ctx, gpio_dir_t mode) {
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TM1637::pinMode (maa_gpio_context ctx, gpio_dir_t mode) {
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maa_result_t error = MAA_SUCCESS;
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maa_result_t error = MAA_SUCCESS;
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error = maa_gpio_dir(ctx, mode);
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error = maa_gpio_dir(ctx, mode);
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@ -140,13 +140,13 @@ TM1637::pinMode (maa_gpio_context ctx, gpio_dir_t mode) {
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}
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}
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}
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}
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maa_result_t
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maa_result_t
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TM1637::start() {
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TM1637::start() {
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pinMode (m_dataPinCtx, MAA_GPIO_OUT);
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pinMode (m_dataPinCtx, MAA_GPIO_OUT);
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usleep(PULSE_LENGTH);
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usleep(PULSE_LENGTH);
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}
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}
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maa_result_t
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maa_result_t
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TM1637::stop() {
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TM1637::stop() {
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pinMode (m_dataPinCtx, MAA_GPIO_OUT);
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pinMode (m_dataPinCtx, MAA_GPIO_OUT);
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usleep(PULSE_LENGTH);
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usleep(PULSE_LENGTH);
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@ -156,7 +156,7 @@ TM1637::stop() {
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usleep(PULSE_LENGTH);
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usleep(PULSE_LENGTH);
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}
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}
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maa_result_t
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maa_result_t
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TM1637::writeByte(uint8_t value) {
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TM1637::writeByte(uint8_t value) {
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for (uint8_t idx = 0; idx < 8; idx++) {
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for (uint8_t idx = 0; idx < 8; idx++) {
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pinMode(m_clkPinCtx, MAA_GPIO_OUT);
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pinMode(m_clkPinCtx, MAA_GPIO_OUT);
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@ -48,7 +48,7 @@ public:
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/**
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/**
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* Updates the values by reading from i2c
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* Updates the values by reading from i2c
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*
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*
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* @return 0 for success
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* @return 0 for success
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*/
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*/
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int update();
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int update();
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@ -41,7 +41,7 @@ IICLcd::IICLcd (int bus, int lcdAddress) {
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}
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}
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}
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}
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maa_result_t
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maa_result_t
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IICLcd::write (int row, int column, std::string msg) {
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IICLcd::write (int row, int column, std::string msg) {
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setCursor (row, column);
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setCursor (row, column);
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write (msg);
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write (msg);
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@ -53,8 +53,8 @@ Jhd1313m1::Jhd1313m1 (int bus, int lcdAddress, int rgbAddress) : IICLcd(bus, lcd
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clear ();
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clear ();
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usleep(4500);
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usleep(4500);
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cmd (m_i2c_lcd_control, LCD_ENTRYMODESET |
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cmd (m_i2c_lcd_control, LCD_ENTRYMODESET |
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LCD_ENTRYLEFT |
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LCD_ENTRYLEFT |
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LCD_ENTRYSHIFTDECREMENT);
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LCD_ENTRYSHIFTDECREMENT);
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setReg (m_i2c_lcd_rgb, m_rgb_address, 0, 0);
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setReg (m_i2c_lcd_rgb, m_rgb_address, 0, 0);
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@ -88,26 +88,26 @@ Jhd1313m1::write (std::string msg) {
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return error;
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return error;
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}
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}
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maa_result_t
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maa_result_t
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Jhd1313m1::setCursor (int row, int column) {
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Jhd1313m1::setCursor (int row, int column) {
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maa_result_t error = MAA_SUCCESS;
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maa_result_t error = MAA_SUCCESS;
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int row_addr[] = { 0x80, 0xc0, 0x14, 0x54};
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int row_addr[] = { 0x80, 0xc0, 0x14, 0x54};
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uint8_t offset = ((column % 16) + row_addr[row]);
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uint8_t offset = ((column % 16) + row_addr[row]);
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uint8_t data[2] = { 0x80, offset };
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uint8_t data[2] = { 0x80, offset };
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error = maa_i2c_address (m_i2c_lcd_control, m_lcd_control_address);
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error = maa_i2c_address (m_i2c_lcd_control, m_lcd_control_address);
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error = maa_i2c_write (m_i2c_lcd_control, data, 2);
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error = maa_i2c_write (m_i2c_lcd_control, data, 2);
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return error;
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return error;
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}
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}
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maa_result_t
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maa_result_t
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Jhd1313m1::clear () {
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Jhd1313m1::clear () {
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return cmd (m_i2c_lcd_control, LCD_CLEARDISPLAY);
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return cmd (m_i2c_lcd_control, LCD_CLEARDISPLAY);
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}
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}
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maa_result_t
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maa_result_t
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Jhd1313m1::home () {
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Jhd1313m1::home () {
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return cmd (m_i2c_lcd_control, LCD_RETURNHOME);
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return cmd (m_i2c_lcd_control, LCD_RETURNHOME);
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}
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}
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@ -117,7 +117,7 @@ Jhd1313m1::home () {
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* private area
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* private area
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* **************
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* **************
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*/
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*/
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maa_result_t
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maa_result_t
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Jhd1313m1::setReg (maa_i2c_context ctx, int deviceAdress, int addr, uint8_t value) {
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Jhd1313m1::setReg (maa_i2c_context ctx, int deviceAdress, int addr, uint8_t value) {
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maa_result_t error = MAA_SUCCESS;
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maa_result_t error = MAA_SUCCESS;
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@ -128,7 +128,7 @@ Jhd1313m1::setReg (maa_i2c_context ctx, int deviceAdress, int addr, uint8_t valu
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return error;
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return error;
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}
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}
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maa_result_t
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maa_result_t
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Jhd1313m1::cmd (maa_i2c_context ctx, uint8_t value) {
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Jhd1313m1::cmd (maa_i2c_context ctx, uint8_t value) {
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maa_result_t error = MAA_SUCCESS;
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maa_result_t error = MAA_SUCCESS;
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@ -78,7 +78,7 @@ Lcm1602::write (std::string msg) {
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return error;
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return error;
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}
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}
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maa_result_t
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maa_result_t
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Lcm1602::setCursor (int row, int column) {
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Lcm1602::setCursor (int row, int column) {
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maa_result_t error = MAA_SUCCESS;
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maa_result_t error = MAA_SUCCESS;
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@ -88,12 +88,12 @@ Lcm1602::setCursor (int row, int column) {
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return send (LCD_SETDDRAMADDR | offset, 0);
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return send (LCD_SETDDRAMADDR | offset, 0);
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}
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}
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maa_result_t
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maa_result_t
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Lcm1602::clear () {
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Lcm1602::clear () {
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return send(LCD_CLEARDISPLAY, 0);
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return send(LCD_CLEARDISPLAY, 0);
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}
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}
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maa_result_t
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maa_result_t
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Lcm1602::home () {
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Lcm1602::home () {
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return send(LCD_RETURNHOME, 0);
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return send(LCD_RETURNHOME, 0);
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}
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}
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@ -103,7 +103,7 @@ Lcm1602::home () {
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* private area
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* private area
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* **************
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* **************
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*/
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*/
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maa_result_t
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maa_result_t
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Lcm1602::send (uint8_t value, int mode) {
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Lcm1602::send (uint8_t value, int mode) {
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maa_result_t ret = MAA_SUCCESS;
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maa_result_t ret = MAA_SUCCESS;
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uint8_t h = value & 0xf0;
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uint8_t h = value & 0xf0;
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@ -71,7 +71,7 @@ MY9221::~MY9221() {
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}
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}
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}
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}
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maa_result_t
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maa_result_t
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MY9221::setBarLevel (uint8_t level) {
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MY9221::setBarLevel (uint8_t level) {
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if (level > 10) {
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if (level > 10) {
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return MAA_ERROR_INVALID_PARAMETER;
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return MAA_ERROR_INVALID_PARAMETER;
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@ -85,7 +85,7 @@ MY9221::setBarLevel (uint8_t level) {
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lockData ();
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lockData ();
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}
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}
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maa_result_t
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maa_result_t
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MY9221::lockData () {
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MY9221::lockData () {
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maa_result_t error = MAA_SUCCESS;
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maa_result_t error = MAA_SUCCESS;
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error = maa_gpio_write (m_dataPinCtx, LOW);
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error = maa_gpio_write (m_dataPinCtx, LOW);
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@ -97,7 +97,7 @@ MY9221::lockData () {
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}
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}
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}
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}
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maa_result_t
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maa_result_t
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MY9221::send16bitBlock (short data) {
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MY9221::send16bitBlock (short data) {
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maa_result_t error = MAA_SUCCESS;
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maa_result_t error = MAA_SUCCESS;
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for (uint8_t bit_idx = 0; bit_idx < MAX_BIT_PER_BLOCK; bit_idx++) {
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for (uint8_t bit_idx = 0; bit_idx < MAX_BIT_PER_BLOCK; bit_idx++) {
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@ -50,7 +50,7 @@ NRF24l01::~NRF24l01 () {
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}
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}
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}
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}
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void
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void
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NRF24l01::nrfInitModule (uint8_t chip_select, uint8_t chip_enable) {
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NRF24l01::nrfInitModule (uint8_t chip_select, uint8_t chip_enable) {
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maa_result_t error = MAA_SUCCESS;
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maa_result_t error = MAA_SUCCESS;
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@ -84,7 +84,7 @@ NRF24l01::nrfInitModule (uint8_t chip_select, uint8_t chip_enable) {
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m_spi = maa_spi_init (0);
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m_spi = maa_spi_init (0);
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}
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}
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void
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void
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NRF24l01::nrfConfigModule() {
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NRF24l01::nrfConfigModule() {
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/* Set RF channel */
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/* Set RF channel */
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nrfConfigRegister (RF_CH, m_channel);
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nrfConfigRegister (RF_CH, m_channel);
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@ -101,7 +101,7 @@ NRF24l01::nrfConfigModule() {
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}
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}
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/* Clocks only one byte into the given MiRF register */
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/* Clocks only one byte into the given MiRF register */
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void
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void
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NRF24l01::nrfConfigRegister(uint8_t reg, uint8_t value) {
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NRF24l01::nrfConfigRegister(uint8_t reg, uint8_t value) {
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nrfCSOn ();
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nrfCSOn ();
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maa_spi_write (m_spi, W_REGISTER | (REGISTER_MASK & reg));
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maa_spi_write (m_spi, W_REGISTER | (REGISTER_MASK & reg));
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@ -109,16 +109,16 @@ NRF24l01::nrfConfigRegister(uint8_t reg, uint8_t value) {
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nrfCSOff ();
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nrfCSOff ();
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}
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}
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void
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void
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NRF24l01::nrfPowerUpRX() {
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NRF24l01::nrfPowerUpRX() {
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m_ptx = 0;
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m_ptx = 0;
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nrfCELow();
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nrfCELow();
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nrfConfigRegister(CONFIG, mirf_CONFIG | ( (1<<PWR_UP) | (1<<PRIM_RX) ) );
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nrfConfigRegister(CONFIG, mirf_CONFIG | ( (1<<PWR_UP) | (1<<PRIM_RX) ) );
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nrfCEHigh();
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nrfCEHigh();
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nrfConfigRegister(STATUS,(1 << TX_DS) | (1 << MAX_RT));
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nrfConfigRegister(STATUS,(1 << TX_DS) | (1 << MAX_RT));
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}
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}
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void
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void
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NRF24l01::nrfFlushRX() {
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NRF24l01::nrfFlushRX() {
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nrfCSOn ();
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nrfCSOn ();
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maa_spi_write (m_spi, FLUSH_RX);
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maa_spi_write (m_spi, FLUSH_RX);
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@ -126,7 +126,7 @@ NRF24l01::nrfFlushRX() {
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}
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}
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/* Sets the receiving address */
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/* Sets the receiving address */
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void
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void
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NRF24l01::nrfSetRXaddr(uint8_t * addr) {
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NRF24l01::nrfSetRXaddr(uint8_t * addr) {
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nrfCELow();
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nrfCELow();
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nrfWriteRegister(RX_ADDR_P1, addr, mirf_ADDR_LEN);
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nrfWriteRegister(RX_ADDR_P1, addr, mirf_ADDR_LEN);
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@ -134,7 +134,7 @@ NRF24l01::nrfSetRXaddr(uint8_t * addr) {
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}
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}
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/* Sets the transmitting address */
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/* Sets the transmitting address */
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void
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void
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NRF24l01::nrfSetTXaddr(uint8_t * addr)
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NRF24l01::nrfSetTXaddr(uint8_t * addr)
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{
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{
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/* RX_ADDR_P0 must be set to the sending addr for auto ack to work. */
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/* RX_ADDR_P0 must be set to the sending addr for auto ack to work. */
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@ -143,20 +143,20 @@ NRF24l01::nrfSetTXaddr(uint8_t * addr)
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}
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}
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/* The broadcast address should be 0xFFFFF */
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/* The broadcast address should be 0xFFFFF */
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void
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void
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NRF24l01::nrfSetBroadcastAddr (uint8_t * addr) {
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NRF24l01::nrfSetBroadcastAddr (uint8_t * addr) {
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nrfCELow ();
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nrfCELow ();
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nrfWriteRegister (RX_ADDR_P2, addr, mirf_ADDR_LEN);
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nrfWriteRegister (RX_ADDR_P2, addr, mirf_ADDR_LEN);
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nrfCEHigh ();
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nrfCEHigh ();
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}
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}
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void
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void
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NRF24l01::nrfSetPayload (uint8_t load) {
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NRF24l01::nrfSetPayload (uint8_t load) {
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m_payload = load;
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m_payload = load;
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}
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}
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void
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void
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NRF24l01::nrfWriteRegister(uint8_t reg, uint8_t * value, uint8_t len)
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NRF24l01::nrfWriteRegister(uint8_t reg, uint8_t * value, uint8_t len)
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{
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{
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nrfCSOn ();
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nrfCSOn ();
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maa_spi_write (m_spi, W_REGISTER | (REGISTER_MASK & reg));
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maa_spi_write (m_spi, W_REGISTER | (REGISTER_MASK & reg));
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@ -164,7 +164,7 @@ NRF24l01::nrfWriteRegister(uint8_t reg, uint8_t * value, uint8_t len)
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nrfCSOff ();
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nrfCSOff ();
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}
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}
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void
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void
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NRF24l01::nrfTransmitSync(uint8_t *dataout, uint8_t len){
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NRF24l01::nrfTransmitSync(uint8_t *dataout, uint8_t len){
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uint8_t i;
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uint8_t i;
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for(i = 0; i < len; i++) {
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for(i = 0; i < len; i++) {
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@ -173,7 +173,7 @@ NRF24l01::nrfTransmitSync(uint8_t *dataout, uint8_t len){
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}
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}
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/* Checks if data is available for reading */
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/* Checks if data is available for reading */
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bool
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bool
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NRF24l01::nrfDataReady() {
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NRF24l01::nrfDataReady() {
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uint8_t status = nrfGetStatus();
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uint8_t status = nrfGetStatus();
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if ( status & (1 << RX_DR) ) {
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if ( status & (1 << RX_DR) ) {
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@ -183,7 +183,7 @@ NRF24l01::nrfDataReady() {
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return !nrfRXFifoEmpty();
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return !nrfRXFifoEmpty();
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||||||
}
|
}
|
||||||
|
|
||||||
uint8_t
|
uint8_t
|
||||||
NRF24l01::nrfGetStatus () {
|
NRF24l01::nrfGetStatus () {
|
||||||
uint8_t rv;
|
uint8_t rv;
|
||||||
nrfReadRegister (STATUS, &rv, 1);
|
nrfReadRegister (STATUS, &rv, 1);
|
||||||
@ -191,7 +191,7 @@ NRF24l01::nrfGetStatus () {
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* Reads an array of bytes from the given start position in the MiRF registers. */
|
/* Reads an array of bytes from the given start position in the MiRF registers. */
|
||||||
void
|
void
|
||||||
NRF24l01::nrfReadRegister (uint8_t reg, uint8_t * value, uint8_t len)
|
NRF24l01::nrfReadRegister (uint8_t reg, uint8_t * value, uint8_t len)
|
||||||
{
|
{
|
||||||
nrfCSOn ();
|
nrfCSOn ();
|
||||||
@ -200,7 +200,7 @@ NRF24l01::nrfReadRegister (uint8_t reg, uint8_t * value, uint8_t len)
|
|||||||
nrfCSOff ();
|
nrfCSOff ();
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
NRF24l01::nrfTransferSync (uint8_t *dataout,uint8_t *datain,uint8_t len) {
|
NRF24l01::nrfTransferSync (uint8_t *dataout,uint8_t *datain,uint8_t len) {
|
||||||
uint8_t i;
|
uint8_t i;
|
||||||
for(i = 0;i < len;i++) {
|
for(i = 0;i < len;i++) {
|
||||||
@ -208,7 +208,7 @@ NRF24l01::nrfTransferSync (uint8_t *dataout,uint8_t *datain,uint8_t len) {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
bool
|
bool
|
||||||
NRF24l01::nrfRXFifoEmpty () {
|
NRF24l01::nrfRXFifoEmpty () {
|
||||||
uint8_t fifo_status;
|
uint8_t fifo_status;
|
||||||
nrfReadRegister (FIFO_STATUS, &fifo_status, sizeof(fifo_status));
|
nrfReadRegister (FIFO_STATUS, &fifo_status, sizeof(fifo_status));
|
||||||
@ -216,8 +216,8 @@ NRF24l01::nrfRXFifoEmpty () {
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* Reads payload bytes into data array */
|
/* Reads payload bytes into data array */
|
||||||
void
|
void
|
||||||
NRF24l01::nrfGetData (uint8_t * data)
|
NRF24l01::nrfGetData (uint8_t * data)
|
||||||
{
|
{
|
||||||
nrfCSOn ();
|
nrfCSOn ();
|
||||||
/* Send cmd to read rx payload */
|
/* Send cmd to read rx payload */
|
||||||
@ -230,7 +230,7 @@ NRF24l01::nrfGetData (uint8_t * data)
|
|||||||
|
|
||||||
/* Sends a data package to the default address. Be sure to send the correct
|
/* Sends a data package to the default address. Be sure to send the correct
|
||||||
* amount of bytes as configured as payload on the receiver. */
|
* amount of bytes as configured as payload on the receiver. */
|
||||||
void
|
void
|
||||||
NRF24l01::nrfSend(uint8_t * value) {
|
NRF24l01::nrfSend(uint8_t * value) {
|
||||||
uint8_t status;
|
uint8_t status;
|
||||||
status = nrfGetStatus();
|
status = nrfGetStatus();
|
||||||
@ -257,12 +257,12 @@ NRF24l01::nrfSend(uint8_t * value) {
|
|||||||
nrfCEHigh(); // Start transmission
|
nrfCEHigh(); // Start transmission
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
NRF24l01::nrfSend () {
|
NRF24l01::nrfSend () {
|
||||||
nrfSend (m_txBuffer);
|
nrfSend (m_txBuffer);
|
||||||
}
|
}
|
||||||
|
|
||||||
bool
|
bool
|
||||||
NRF24l01::nrfIsSending () {
|
NRF24l01::nrfIsSending () {
|
||||||
uint8_t status;
|
uint8_t status;
|
||||||
if (m_ptx) { // Sending mode.
|
if (m_ptx) { // Sending mode.
|
||||||
@ -270,46 +270,46 @@ NRF24l01::nrfIsSending () {
|
|||||||
/* if sending successful (TX_DS) or max retries exceded (MAX_RT). */
|
/* if sending successful (TX_DS) or max retries exceded (MAX_RT). */
|
||||||
if((status & ((1 << TX_DS) | (1 << MAX_RT)))){
|
if((status & ((1 << TX_DS) | (1 << MAX_RT)))){
|
||||||
nrfPowerUpRX();
|
nrfPowerUpRX();
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
NRF24l01::nrfPowerUpTX () {
|
NRF24l01::nrfPowerUpTX () {
|
||||||
m_ptx = 1;
|
m_ptx = 1;
|
||||||
nrfConfigRegister (CONFIG, mirf_CONFIG | ( (1<<PWR_UP) | (0<<PRIM_RX) ) );
|
nrfConfigRegister (CONFIG, mirf_CONFIG | ( (1<<PWR_UP) | (0<<PRIM_RX) ) );
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
NRF24l01::nrfPowerDown () {
|
NRF24l01::nrfPowerDown () {
|
||||||
nrfCELow ();
|
nrfCELow ();
|
||||||
nrfConfigRegister (CONFIG, mirf_CONFIG);
|
nrfConfigRegister (CONFIG, mirf_CONFIG);
|
||||||
}
|
}
|
||||||
|
|
||||||
maa_result_t
|
maa_result_t
|
||||||
NRF24l01::nrfCEHigh () {
|
NRF24l01::nrfCEHigh () {
|
||||||
return maa_gpio_write (m_cePinCtx, HIGH);
|
return maa_gpio_write (m_cePinCtx, HIGH);
|
||||||
}
|
}
|
||||||
|
|
||||||
maa_result_t
|
maa_result_t
|
||||||
NRF24l01::nrfCELow () {
|
NRF24l01::nrfCELow () {
|
||||||
return maa_gpio_write (m_cePinCtx, LOW);
|
return maa_gpio_write (m_cePinCtx, LOW);
|
||||||
}
|
}
|
||||||
|
|
||||||
maa_result_t
|
maa_result_t
|
||||||
NRF24l01::nrfCSOn () {
|
NRF24l01::nrfCSOn () {
|
||||||
return maa_gpio_write (m_csnPinCtx, LOW);
|
return maa_gpio_write (m_csnPinCtx, LOW);
|
||||||
}
|
}
|
||||||
|
|
||||||
maa_result_t
|
maa_result_t
|
||||||
NRF24l01::nrfCSOff () {
|
NRF24l01::nrfCSOff () {
|
||||||
return maa_gpio_write (m_csnPinCtx, HIGH);
|
return maa_gpio_write (m_csnPinCtx, HIGH);
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
NRF24l01::nrfListenForChannel() {
|
NRF24l01::nrfListenForChannel() {
|
||||||
if(!nrfIsSending() && nrfDataReady()) {
|
if(!nrfIsSending() && nrfDataReady()) {
|
||||||
nrfGetData(m_rxBuffer);
|
nrfGetData(m_rxBuffer);
|
||||||
|
@ -80,7 +80,7 @@
|
|||||||
#define PLL_LOCK 4
|
#define PLL_LOCK 4
|
||||||
#define RF_DR 3
|
#define RF_DR 3
|
||||||
#define RF_PWR 1
|
#define RF_PWR 1
|
||||||
#define LNA_HCURR 0
|
#define LNA_HCURR 0
|
||||||
#define RX_DR 6
|
#define RX_DR 6
|
||||||
#define TX_DS 5
|
#define TX_DS 5
|
||||||
#define MAX_RT 4
|
#define MAX_RT 4
|
||||||
|
Loading…
x
Reference in New Issue
Block a user