This commit is contained in:
2025-08-10 08:53:45 +03:00
parent aae08f710a
commit 0b6e04a1c0

View File

@@ -73,6 +73,7 @@ avr_err_t zh_avr_i2c_master_receive(const uint8_t addr, uint8_t *data, uint8_t s
ZH_ERROR_CHECK(data != NULL || size > 0, AVR_ERR_INVALID_ARG);
_work_mode = MASTER_READ;
_target_i2c_address = addr;
_master_tx_data = data;
_master_tx_data_size = size;
_master_tx_data_counter = 0;
return _zh_avr_i2c_master_start(xTicksToWait);
@@ -104,7 +105,7 @@ avr_err_t _zh_avr_i2c_master_start(TickType_t xTicksToWait)
ISR(TWI_vect)
{
BaseType_t xHigherPriorityTaskWoken = pdFALSE;
switch (TWSR & 0xF8) // Отсекаем биты прескалера
switch (TWSR & 0xF8)
{
case 0x00: // Bus error.
printf("00\n");
@@ -116,20 +117,13 @@ ISR(TWI_vect)
switch (_work_mode)
{
case MASTER_WRITE:
case MASTER_WRITE_REG:
case MASTER_READ_REG:
TWDR = (_target_i2c_address << 1) | I2C_MASTER_WRITE;
// TWCR = I2C_START;
break;
case MASTER_READ:
TWDR = (_target_i2c_address << 1) | I2C_MASTER_READ;
// TWCR = I2C_START;
break;
case MASTER_WRITE_REG:
break;
case MASTER_READ_REG:
break;
case MASTER_PROBE:
TWDR = (_target_i2c_address << 1) | I2C_MASTER_READ;
// TWCR = I2C_START;
break;
default:
break;
@@ -182,6 +176,14 @@ ISR(TWI_vect)
case MASTER_WRITE:
break;
case MASTER_READ:
if (_master_tx_data_size == 1)
{
TWCR = I2C_START;
}
else
{
TWCR = I2C_START | (1 << TWEA);
}
break;
case MASTER_WRITE_REG:
break;
@@ -202,9 +204,21 @@ ISR(TWI_vect)
break;
case 0x50: // Data byte has been received. ACK has been returned.
printf("50\n");
*(_master_tx_data++) = TWDR;
if (--_master_tx_data_size == 1)
{
TWCR = I2C_START;
}
else
{
TWCR = I2C_START | (1 << TWEA);
}
break;
case 0x58: // Data byte has been received. NOT ACK has been returned.
printf("58\n");
*(_master_tx_data) = TWDR;
TWCR = I2C_START | (1 << TWSTO);
xEventGroupSetBitsFromISR(_event_group_handle, I2C_OK, &xHigherPriorityTaskWoken);
break;
// printf("%d\n", (TWSR & 0xF8));
// case 0x00: // Bus Fail (автобус сломался)