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RSC: Minor comment changes
Signed-off-by: Abhishek Malik <abhishek.malik@intel.com>
This commit is contained in:
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96eb834e9b
commit
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@ -42,4 +42,4 @@ process.on('SIGINT', function()
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clearInterval(myInterval);
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console.log("Exiting...");
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process.exit(0);
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});
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});
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@ -52,4 +52,4 @@ def main():
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time.sleep(1)
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if __name__ == '__main__':
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main()
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main()
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@ -16,4 +16,4 @@
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System.exit(1);
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}
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}
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%}
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%}
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@ -5,4 +5,4 @@
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#include "rsc.hpp"
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%}
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%include "rsc.hpp"
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%include "rsc.hpp"
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@ -8,4 +8,4 @@
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%include "rsc.hpp"
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%{
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#include "rsc.hpp"
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%}
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%}
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@ -21,7 +21,6 @@
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "rsc.h"
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upm_result_t rsc_eeprom_read(rsc_context dev, uint16_t address, uint8_t* buf, int len, uint8_t arglen);
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@ -286,6 +285,7 @@ upm_result_t rsc_retrieve_coefficients(rsc_context dev) {
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base_address = RSC_OFFSET_COEFFICIENT_0_LSB + i*80;
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rsc_eeprom_read(dev, base_address, l_coeffs, (RSC_COEFF_ADDRESS_SPACE_SIZE), RSC_EEPROM_STANDARD_ARGUMENT_LENGTH);
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// storing all the coefficients
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for(j=0; j<RSC_COEFF_T_COL_NO; j++) {
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temp = l_coeffs[j*4+0] |
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(l_coeffs[j*4+1]<<8) |
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@ -308,6 +308,8 @@ upm_result_t rsc_adc_write(rsc_context dev, uint8_t reg, uint8_t num_bytes, uint
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return UPM_ERROR_UNSPECIFIED;
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uint8_t tx[num_bytes+1];
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// The ADC REG Write command is as follows: 0100 RRNN
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// R - Register Number (0,1,2,3) N - Number of Bytes (0,1,2,3) (0 means 1)
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tx[0] = RSC_ADC_WREG|((reg<<2)&RSC_ADC_REG_MASK)|((num_bytes-1)&RSC_ADC_NUM_BYTES_MASK);
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int cnt = 0;
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for(cnt=0; cnt<num_bytes; cnt++)
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@ -381,6 +383,7 @@ upm_result_t rsc_adc_read(rsc_context dev, READING_T type, uint8_t* data) {
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uint8_t tx[2]={0};
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tx[0] = RSC_ADC_WREG|((1<<2)&RSC_ADC_REG_MASK);
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// Composing tx[1], which includes Mode, DataRate, Pressure/Temperature choice
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tx[1] = (((dev->data_rate << RSC_DATA_RATE_SHIFT)&RSC_DATA_RATE_MASK) |
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((dev->mode << RSC_OPERATING_MODE_SHIFT)&RSC_OPERATING_MODE_MASK) |
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(((type&0x01)<<1)|RSC_SET_BITS_MASK));
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@ -471,6 +474,7 @@ upm_result_t rsc_setup_adc(rsc_context dev, uint8_t* adc_init_values) {
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upm_result_t rsc_add_dr_delay(rsc_context dev) {
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float delay = 0;
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// calculating delay based on the Data Rate
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switch(dev->data_rate){
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case N_DR_20_SPS:
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delay = MSEC_PER_SEC/20;
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@ -246,4 +246,4 @@ typedef enum {
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*/
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typedef enum {
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EEPROM = 0,
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ADC } ACCESS_T;
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ADC } ACCESS_T;
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